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Journal of Applied Physics

Current-injection Josephson latch employing a single-flux quantum. II

Toshishige Yamada, J. Sone

Published May 1, 1986• 1 citation
Publisher

Abstract

A novel current-injection Josephson latch with a single-flux quantum memory is experimentally verified. The experimental latch is fabricated by 5-μm Pb-alloy technology and occupies an area of 270×175 μm2, achieving one order of magnitude area reduction compared to magnetically coupled latch. In low-frequency experiments, the proper operation of a single latch under arbitrary input conditions and the proper data transfer from latch to latch are observed. In high-speed experiments, the proper operation of a single latch with cycle time down to 3.7 ns is observed, which is limited by the high-speed restriction of the test instruments at room temperature. These results show the possibility that the complete current injection logic system can be constructed by combining the present latch and current-injection logic gates.

DOI
10.1063/1.336902

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Some basic cells in the rapid single-flux quantum (RSFQ) family of superconductive logic circuits were studied. An input stage, a buffer, and an OR gate were simulated and laid out for a standard niobium-based fabrication process. The resulting circuits perform properly for clock speeds up to 1 GHz. For the simpler circuits tested, the measured margins are wide, consistent with simulations, and not very dependent on clock speed. However, margin decreases with increased circuit complexity. The input stage converts a rising edge into an SFQ pulse, which has a small amplitude and narrow width in time. On the present circuits, these pulses are about 200 mu V in amplitude and 10 ps in width. To facilitate measurement, the authors have chosen as the output an asymmetrical superconducting quantum interference device (SQUID) consisting of two Josephson junctions. It converts SFQ pulses into 2.5 mV latching output levels on chip. By inductively coupling SFQ pulses into the SQUID loop, DC current isolation between the RSFQ circuit-under-test and the output stage is provided. The SQUID was optimized for 2 GHz operations.>

IEEE Transactions on Applied Superconductivity•Mar 1, 1993•7 citations
A novel current-injection Josephson latch with a single-flux quantum memory is experimentally verified. The experimental latch is fabricated by 5-μm Pb-alloy technology and occupies an area of 270×175 μm2, achieving one order of magnitude area reduction compared to magnetically coupled latch. In low-frequency experiments, the proper operation of a single latch under arbitrary input conditions and the proper data transfer from latch to latch are observed. In high-speed experiments, the proper operation of a single latch with cycle time down to 3.7 ns is observed, which is limited by the high-speed restriction of the test instruments at room temperature. These results show the possibility that the complete current injection logic system can be constructed by combining the present latch and current-injection logic gates.
A new current-injection Josephson latch employing a single-flux quantum is proposed. It has a master-slave circuit configuration and operates under ac power supply. In the circuit, data are stored as a circulating current in a superconducting loop consisting of a single junction and inductances. A two-junction interferometer gate directly coupled to the loop reads out the stored data. Dual-rail signals are generated from the read-out data by Josephson junctions and resister-coupled Josephson logic gates. The isolation between a master circuit and a slave circuit is realized using high-impedance states in the Josephson junctions. The circuit design and computer-simulation results on the circuit operation are described in this paper.
A new Josephson latching driver with a current-injection device at an input port has been developed and tested. It has high input sensitivity and a wide bias margin. Under an optimal bias condition, the bit-error rate (BER) of this driver is below 10/sup -12/ at data rates of 5 and 10 Gb/s. The driver can be switched by superconducting single-flux quantum (SFQ) pulse input and can be used as an amplifier to test the BER of SFQ circuits. In such a test, the BER of an SFQ converter operating at 5 Gb/s was less than 10/sup -12/ with bias margin of /spl plusmn/20%.
The adiabatic quantum flux parametron (AQFP) is an energy-efficient, high-speed superconducting logic device. To observe the tiny output currents from the AQFP in experiments, high-speed voltage drivers are indispensable. In the present study, we develop a compact voltage driver for AQFP logic based on a Josephson latching driver (JLD), which has been used as a high-speed driver for rapid single-flux-quantum (RSFQ) logic. In the JLD-based voltage driver, the signal currents of AQFP gates are converted into gap-voltage-level signals via an AQFP/RSFQ interface and a four-junction logic gate. Furthermore, this voltage driver includes only 15 Josephson junctions, which is much fewer than in the case for the previously designed driver based on dc superconducting quantum interference devices (60 junctions). In measurement, we successfully operate the JLD-based voltage driver up to 4 GHz. We also evaluate the bit error rate (BER) of the driver and find that the BER is 7.92×10-10 and 2.67×10-3 at 1GHz and 4GHz, respectively.
The high-speed operation of a one-channel output interface for a single-flux quantum (SFQ) system has been demonstrated. The interface consisted of a Josephson latching driver, a room-temperature semiconductor amplifier, and a decision circuit module. The Josephson latching driver was fabricated by using a 2.5-kA/cm/sup 2/ standard Nb junction process and used to amplify an SFQ pulse into a 5.5-mV level signal at 10 Gb/s. The interface converted the SFQ pulse signal into a nonreturn-to-zero signal having an amplitude of 1 V at 10 Gb/s.
Recent developments concerning the rapid single-flux-quantum (RSFQ) circuit family are reviewed. Elementary cells in this circuit family can generate, pass, memorize, and reproduce picosecond voltage pulses with a nominally quantized area corresponding to transfer of a single magnetic flux quantum across a Josephson junction. Functionally, each cell can be viewed as a combination of a logic gate and an output latch (register) controlled by clock pulses, which are physically similar to the signal pulses. Hand-shaking style of local exchange by the clock pulses enables one to increase complexity of the LSI RSFQ systems without loss of operating speed. The simplest components of the RSFQ circuitry have been experimentally tested at clock frequencies exceeding 100 GHz, and an increase of the speed beyond 300 GHz is expected as a result of using an up-to-date fabrication technology. This review includes a discussion of possible future developments and applications of this novel, ultrafast digital technology.>
Some basic cells in the rapid single-flux quantum (RSFQ) family of superconductive logic circuits were studied. An input stage, a buffer, and an OR gate were simulated and laid out for a standard niobium-based fabrication process. The resulting circuits perform properly for clock speeds up to 1 GHz. For the simpler circuits tested, the measured margins are wide, consistent with simulations, and not very dependent on clock speed. However, margin decreases with increased circuit complexity. The input stage converts a rising edge into an SFQ pulse, which has a small amplitude and narrow width in time. On the present circuits, these pulses are about 200 mu V in amplitude and 10 ps in width. To facilitate measurement, the authors have chosen as the output an asymmetrical superconducting quantum interference device (SQUID) consisting of two Josephson junctions. It converts SFQ pulses into 2.5 mV latching output levels on chip. By inductively coupling SFQ pulses into the SQUID loop, DC current isolation between the RSFQ circuit-under-test and the output stage is provided. The SQUID was optimized for 2 GHz operations.>