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IEICE Technical Report; IEICE Tech. Rep.

Design and operation of single-flux-quantum logic gates with a floating storage loop

Koki Yamazaki, Hiroshi Shimada, Yoshinao Mizugaki

Published Jan 9, 2020• 0 citations
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Design methodology of single-flux-quantum flip-flops composed of both 0- and π-shifted Josephson junctions

Yuki Yamanashi, Sotaro Nakaishi, Akira Sugiyama +2 more

A methodology for designing single-flux-quantum (SFQ) flip-flops composed of both conventional (0-) and π -shifted Josephson junctions is investigated. We investigated the implementation of a storage loop, which can store flux quantum and is indispensable to express binary logic states in superconductor logic circuits. As all SFQ flip-flops have storage loops, the investigated design methodology can be applied to their design. We designed several SFQ flip-flops composed of 0- and π -shifted Josephson junctions using the investigated design methodology. The performances of the designed SFQ flip-flops were quantitatively evaluated by using an analog circuit simulator which we developed. We confirmed the correct operation of various SFQ flip-flops composed of 0- and π -shifted Josephson junctions with wide operating margins. Moreover, we observed that the investigated design methodology is suitable for SFQ flip-flops with complementary outputs because a storage loop composed of both 0- and π -shifted Josephson junctions has a symmetric structure and the complementary output function can be realized by using the storage loop. Our investigation indicates that the number of Josephson junctions and static power consumption of a non-destructive read-out flip-flop with complementary outputs (NDROC) can be reduced to less than half of those of the conventional NDROC, which has two storage loops composed of 0-Josephson junctions, to realize the complementary output function. The investigated design methodology is expected to be applied to not only SFQ circuits but also other superconducting logic circuits and novel reconfigurable logic devices using programmable 0- π Josephson junctions.

Superconductor Science and Technology•Aug 2, 2018•37 citations
We propose a new design approach for high- throughput arithmetic circuits based on state transitions using single-flux-quantum (SFQ) logic circuits. Microprocessors have several complex interconnects in datapath including loops of data, to which only one SFQ pulse is allowed to be confined, and the loops can spoil the high-throughput nature of SFQ circuits. In our new approach, we regard an arithmetic circuit with loops as a sequential logic circuit, and we use nondestructive readout gates (NDROs) as storage elements of the internal state. We can eliminate the loops and achieve high throughput by translating calculations into transitions of the state stored in the NDROs. We have implemented a bit-serial adder with the proposed approach, and demonstrated 36-GHz operations using the niobium 2.5-kA/cm2standard process technology.
A methodology for designing single-flux-quantum (SFQ) flip-flops composed of both conventional (0-) and π -shifted Josephson junctions is investigated. We investigated the implementation of a storage loop, which can store flux quantum and is indispensable to express binary logic states in superconductor logic circuits. As all SFQ flip-flops have storage loops, the investigated design methodology can be applied to their design. We designed several SFQ flip-flops composed of 0- and π -shifted Josephson junctions using the investigated design methodology. The performances of the designed SFQ flip-flops were quantitatively evaluated by using an analog circuit simulator which we developed. We confirmed the correct operation of various SFQ flip-flops composed of 0- and π -shifted Josephson junctions with wide operating margins. Moreover, we observed that the investigated design methodology is suitable for SFQ flip-flops with complementary outputs because a storage loop composed of both 0- and π -shifted Josephson junctions has a symmetric structure and the complementary output function can be realized by using the storage loop. Our investigation indicates that the number of Josephson junctions and static power consumption of a non-destructive read-out flip-flop with complementary outputs (NDROC) can be reduced to less than half of those of the conventional NDROC, which has two storage loops composed of 0-Josephson junctions, to realize the complementary output function. The investigated design methodology is expected to be applied to not only SFQ circuits but also other superconducting logic circuits and novel reconfigurable logic devices using programmable 0- π Josephson junctions.