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IEEE Micro

FPGA-Accelerated Quantum Computing Emulation and Quantum Key Distillation

He Li, Yaru Pang

Published Jun 2, 2021• 33 citations
Publisher

Abstract

In the past decades, field-programmable gate arrays (FPGAs) have demonstrated an interesting physical platform to facilitate quantum information processing, particularly in the emergence of domain-specific hardware accelerators for quantum computing emulation and quantum key distillation. While conventional general-purpose hardware platforms have been used for quantum information processing, FPGAs promise deep pipeline parallelism, adaptable interface, and trivial support for custom-precision operation. Therefore, the time is ripe for describing recent development of quantum computing emulators and quantum key distillation accelerators on FPGAs. In this article, we provide a comprehensive review of the state-of-the-art in this active field, with a balance between theoretical, implementational, and technological results. Challenges and promising research opportunities are also discussed.

DOI
10.1109/mm.2021.3085431

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Field Programmable Gate Arrays (FPGAs) have been used in most of the physics sub-fields for various unique purposes. This includes particle physics, quantum optics, and, more recently, quantum computing. FPGAs boast many benefits over previous experimental and computational setups. They are versatile, easy to program, and cost-effective, leading to an understandable desire to incorporate them into the new field of quantum computing. While FPGAs have been used to help control the readout and control of physical qubits, they can also be a good tool for improving algorithm simulations, which is the focus of this paper. Different algorithms have different computational limits because of the varying operations and circuit depth levels. Due to the ease of incorporating parallel processes and the ability to optimize FPGAs on a deeper level, we can speed up computationally expensive operations, increasing the size of the quantum circuits we can simulate. This paper aims to provide an educational walkthrough for quantum computing physicists interested in taking advantage of FPGAs in their research. Our findings indicate that an inexpensive FPGA with a clock rate of 100MHz can perform simple, unoptimized matrix operations on the order of 107 ns faster than a CPU using optimized Python libraries. This can be further improved upon using more expensive hardware and optimized designs. This will provide many researchers and students with the tools needed to study quantum algorithms without the need for costly hardware.
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With the development of quantum algorithms and practical quantum computing devices, how to efficiently simulate emerging quantum algorithms via quantum circuit simulators on classical parallel-computing hardware platforms has raised more and more interest. The superior customized parallelism and pipeline efficiency over general-purpose processors make FPGAs ideal for large scale quantum algorithms/circuits simulation. Since the quantum Fourier transform (QFT) has been used in many quantum algorithms, such as quantum linear algebra, quantum phase estimation and quantum machine leaning, this paper presented a novel precision analysis and an efficient customized-precision QFT simulator accelerated on AMD Alveo U55C FPGAs. Customized-precision representations via high-level synthesis are employed for QFT implementation with up to 16 qubits, demonstrating up-to 8.3× speedup versus implementations in floating-point arithmetic within an error tolerance of 0.1%.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Artix-7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover's search, and BB84 QKD, with results benchmarked against IBM's noiseless quantum simulator. Utilizing FPGA's customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.
A 16-qubit quantum-computing emulator executing quantum algorithms at high speed is proposed. By limiting the command of the quantum computing emulator to the minimum function required with the quantum algorithm, probability amplitudes are expressed with one bit and the functions of many qubits are integrated on a field programmable gate array (FPGA). As a result of implementing the emulator in the FPGA, it is found that the emulator has a 250 times higher-speed as compared with a software simulation by a general-purpose processor.