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IEEE Transactions on Applied Superconductivity

Design and Verification of SFQ Cell Library for Superconducting LSI Digital Circuits

Xiaoping Gao, Qi Qiao, Mingliang Wang, Minghui Niu, Huanli Liu, Masaaki Maezawa, Jie Ren, Zhen Wang

Published Mar 11, 2021• 34 citations
Publisher

Abstract

We have developed a cell library for superconducting large scale integrated (LSI) digital circuits based on Single Flux Quantum (SFQ) devices. The circuits were designed for a 6-kA/cm2Nb/AlOx/Nb junction process with 10 mask levels including one ground plane and two Nb wiring layers. The initial design and optimization of the circuit parameters were achieved by means of the optimization functions in a circuit simulator, PSCAN2, to ensure that important circuit parameters, Josephson critical current (IC), bias current (Ibias), and inductance satisfied minimal margin requirements. Critical margins of ICand Ibiaswere then further improved manually. To compensate the scattering in the circuit parameters from fabrication by design as much as possible, the critical junction parameters were optimized to further centralize the IC. The library cells were laid out following our design rules determined by systematic experiments on process control monitors (PCM). Basic cells including Josephson transmission lines, splitters, confluence buffers, D flip-flops, T flip-flops, and XOR and NDRO gates were designed, fabricated, and successfully tested at low frequencies. Wide overlaps of the operating regions for the common bias voltages were confirmed.

DOI
10.1109/tasc.2021.3062570

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We have developed a cell library for superconducting large scale integrated (LSI) digital circuits based on Single Flux Quantum (SFQ) devices. The circuits were designed for a 6-kA/cm2Nb/AlOx/Nb junction process with 10 mask levels including one ground plane and two Nb wiring layers. The initial design and optimization of the circuit parameters were achieved by means of the optimization functions in a circuit simulator, PSCAN2, to ensure that important circuit parameters, Josephson critical current (IC), bias current (Ibias), and inductance satisfied minimal margin requirements. Critical margins of ICand Ibiaswere then further improved manually. To compensate the scattering in the circuit parameters from fabrication by design as much as possible, the critical junction parameters were optimized to further centralize the IC. The library cells were laid out following our design rules determined by systematic experiments on process control monitors (PCM). Basic cells including Josephson transmission lines, splitters, confluence buffers, D flip-flops, T flip-flops, and XOR and NDRO gates were designed, fabricated, and successfully tested at low frequencies. Wide overlaps of the operating regions for the common bias voltages were confirmed.
A single flux quantum (SFQ) logic cell library has been developed for the 10kA/cm2 Nb multi-layer fabrication process to efficiently design large-scale SFQ digital circuits. In the new cell library, the critical current density of Josephson junctions is increased from 2.5kA/cm2 to 10kA/cm2 compared to our conventional cell library, and the McCumber-Stwart parameter of each Josephson junction is increased to 2 in order to increase the circuit operation speed. More than 300 cells have been designed, including fundamental logic cells and wiring cells for passive interconnects. We have measured all cells and confirmed they stably operate with wide operating margins. On-chip high-speed test of the toggle flip-flop (TFF) cell has been performed by measuring the input and output voltages. The TFF cell at the input frequency of up to 400GHz was confirmed to operate correctly. Also, several fundamental digital circuits, a 4-bit concurrent-flow shift register and a bit-serial adder have been designed using the new cell library, and the correct operations of the circuits have been demonstrated at high clock frequencies of more than 100GHz.
ENGLISH ABSTRACT: Rapid Single Flux Quantum (RSFQ) cells are key in the design of complex and applicable RSFQ electronic circuits. These cells are low-level circuit elements that are used repeatedly to build larger, applicable RSFQ circuitry. Making these cells simple to layout and manufacture, but reliable for extensive use demands a careful development process for RSFQ cells. Cell functionality is verified through simulations, thereafter the cell is laid out in special software packages. Inductance of on-chip superconductor structures is extracted through careful modelling with numerical field solver software. A cell library has been developed by incorporating existing or published cells after further analysis and optimization, as well as developing new cells. Cells that have been adapted into the library include the Josephson transmission line (JTL), Splitter, Merger, D-Flip Flop (DFF), T-Flip Flop (TFF), NOT, AND, OR and XOR, DC-SFQ and SFQ-DC and PTL Driver and Receivers. New cells include NOR, NAND and XNOR. The cells were designed for the IPHT’s RSFQ1D 1kA/cmª and Hypres’ 4.5kA/cmª processes. The cells in the library have good bias current operating margins obtained through simulations (> ±26%). All cells have all the parameters listed in the thesis including extracted inductance values. In order to have a complete and verified RSFQ cell library, cells have been sent for fabrication at IPHT and Hypres facilities. These cells can now be tested on-chip, in the laboratory, to establish functionality and practical bias current margins. All test signal patterns and bias currents required for testing are defined to allow co-workers or collaborators to test the cells.
The increase in the single-flux-quantum (SFQ) circuit scale will cause the overall bias current to increase dramatically. The magnetic field interference caused by the current supplied to the SFQ circuit can no longer be ignored. In addition, more complex SFQ circuits require a cell library for more diversified cell types and a more stable operating range to ensure the circuits’ yield. The SIMIT-Nb03P process is then put forward as a tradeoff between process stability and cost. It is compatible with the Nb03 process and does not need an expensive chemical mechanical planarization process. The added new dc power layer is proved to have less interference by simulation. The conversion from Nb03 to Nb03P cell library was very convenient. In addition, some new cells are designed to meet the requirements of complex SFQ circuits. Test circuits of 20 cells of Nb03P were designed and fabricated and were fully verified at low frequencies. The common bias margin of the whole cell library is (–26%, 20%). A variety of large-scale circuits (up to more than 10 000 Josephson junctions) achieve correct function at high frequencies and show good yields on the wafer. It shows that this updated process is cost efficient and suitable for large-scale integration circuits.
We report the measurement results of the low-power single-flux-quantum (SFQ) circuits below 20 mK using a dilution refrigerator. We have been developing the SFQ circuits using a lowered critical current density process (250 A/cm2) and low-voltage design (0.1–0.5 mV) toward digital signal processing near superconductor quantum bits. So far, we have designed several basic SFQ cells, including wiring elements, flip-flops, and logic gates, using the four Nb planarized layer process and obtained the correct operation at 300 mK. In this study, we tested several SFQ circuits aiming to evaluate the operation at the mixing chamber stage of a dilution refrigerator. Our experimental results show that there was almost no change of device parameters, such as critical current values of Josephson junctions, or operating margins of the basic cells between 300 mK and 16 mK.
Design and Operation of RSFQ Cell Library Fabricated by Using a 10-kA/cm2{\rm kA/cm}^{2}kA/cm2 Nb Technology
A 10-kA/cm2Nb/AlOchi/Nb junction technology for rapid single flux quantum (RSFQ) integrated circuits has been developed. Modifying our standard 1.6-kA/cm2cell library, we have implemented elementary cells used to build RSFQ digital-to-analog converters for ac voltage standard applications. The 10-kA/cm2library cells have been fabricated by utilizing existing process tools. Correct operations of the circuits have been confirmed at low speed. The maximum operating frequencies evaluated by an average-voltage measurement technique were consistent with the scaling rules of RSFQ circuits.
Superconducting digital circuits based on Josephson junctions with amorphous niobium-silicon (a-NbSi) barriers have been designed, fabricated, and tested. Single-flux-quantum (SFQ) shift registers operated with ±30% bias margins, confirming junction reproducibility and uniformity. Static digital dividers operated up to 165 GHz for a single value of bias current, which was only marginally slower than circuits fabricated with externally shunted AlOx-barrier junctions having a comparable critical current density of 4.5 kA/cm2. In comparison, self-shunted a-NbSi junctions enabled a doubling in circuit density. This and their relatively thick 10 nm barriers could increase the yield of complex SFQ circuits.