A 10-kA/cm2Nb/AlOchi/Nb junction technology for rapid single flux quantum (RSFQ) integrated circuits has been developed. Modifying our standard 1.6-kA/cm2cell library, we have implemented elementary cells used to build RSFQ digital-to-analog converters for ac voltage standard applications. The 10-kA/cm2library cells have been fabricated by utilizing existing process tools. Correct operations of the circuits have been confirmed at low speed. The maximum operating frequencies evaluated by an average-voltage measurement technique were consistent with the scaling rules of RSFQ circuits.
Design and Operation of RSFQ Cell Library Fabricated by Using a 10-kA/cm2 Nb Technology
A 10-kA/cm2Nb/AlOchi/Nb junction technology for rapid single flux quantum (RSFQ) integrated circuits has been developed. Modifying our standard 1.6-kA/cm2cell library, we have implemented elementary cells used to build RSFQ digital-to-analog converters for ac voltage standard applications. The 10-kA/cm2library cells have been fabricated by utilizing existing process tools. Correct operations of the circuits have been confirmed at low speed. The maximum operating frequencies evaluated by an average-voltage measurement technique were consistent with the scaling rules of RSFQ circuits.
A single flux quantum (SFQ) logic cell library has been developed for the 10kA/cm2 Nb multi-layer fabrication process to efficiently design large-scale SFQ digital circuits. In the new cell library, the critical current density of Josephson junctions is increased from 2.5kA/cm2 to 10kA/cm2 compared to our conventional cell library, and the McCumber-Stwart parameter of each Josephson junction is increased to 2 in order to increase the circuit operation speed. More than 300 cells have been designed, including fundamental logic cells and wiring cells for passive interconnects. We have measured all cells and confirmed they stably operate with wide operating margins. On-chip high-speed test of the toggle flip-flop (TFF) cell has been performed by measuring the input and output voltages. The TFF cell at the input frequency of up to 400GHz was confirmed to operate correctly. Also, several fundamental digital circuits, a 4-bit concurrent-flow shift register and a bit-serial adder have been designed using the new cell library, and the correct operations of the circuits have been demonstrated at high clock frequencies of more than 100GHz.
Rapid Single-Flux-Quantum Circuits Fabricated Using 20-kA/cm2Nb/AlOx/Nb Process
We designed and fabricated rapid single-flux-quantum (RSFQ) circuits using a new 20-kA/cm2process based on conventional Nb/AlOx/Nb Josephson junction (JJ) technology. Circular JJs were fabricated to improve their uniformity. They had sufficiently low spread of the critical currents for large-scale RSFQ circuits. We selected the circuit design parameters carefully, including the bias voltage and McCumber-Stewart parameter, balancing the energy consumption, switching speeds, margins, and integration density. We demonstrated several logic gates and shift registers at a clock frequency of 154 GHz with the designed bias voltage of 2.5 mV, and demonstrated energy-efficient shift registers using the low-voltage RSFQ (LV-RSFQ) technique at 83 GHz.
Digital-to-analog converters based on rapid single flux quantum circuits (RSFQ-D/A converters) are candidates for the next generation of ac voltage standard. We re-optimized the device parameters of a voltage multiplier (VM) cell, one of the important components in the RSFQ-D/A converter, to implement a new voltage doubler (VD) cell. The output voltage of the VD cell was twice as high as that of the conventional VM cell. We fabricated VD cells using a Nb technology. We confirmed correct operation of the VD cells at input frequencies up to 30 GHz.
Abstract Superconductor logic families can operate with small power dissipation and are thus suitable as building blocks for various computing systems. In some applications, superconductor logic circuits should be designed using Josephson junctions with low I c values ( I c : critical current). For instance, lowering I c values enables qubit interface circuits to operate with very small power dissipation at ~10 mK and stochastic electronics to easily induce stochastic operations. In this study, we develop the AIST 1 kA cm −2 Nb planarized process (1KP) with a minimum critical current of 10 µA, dedicated to the design of qubit interface circuits and stochastic electronics. We also develop rapid single-flux-quantum (RSFQ) and adiabatic quantum-flux-parametron (AQFP) cell libraries using the 1KP. The power dissipation of RSFQ logic using the 1KP can be reduced to 3.2% of that for conventional RSFQ logic by reducing both I c values and a bias voltage. Furthermore, the amount of supply currents for AQFP circuits using the 1KP can be reduced to ~40% of that for conventional AQFP circuits due to a large mutual inductance between AQFP gates and excitation lines, which results from a reduction in I c and an increase in inductances. We demonstrate RSFQ and AQFP circuits fabricated by the 1KP at 4.2 K. These results indicate that RSFQ and AQFP circuits using the 1KP have the potential to be used for the design of qubit interface circuits and stochastic electronics.
We have developed a cell library for superconducting large scale integrated (LSI) digital circuits based on Single Flux Quantum (SFQ) devices. The circuits were designed for a 6-kA/cm2Nb/AlOx/Nb junction process with 10 mask levels including one ground plane and two Nb wiring layers. The initial design and optimization of the circuit parameters were achieved by means of the optimization functions in a circuit simulator, PSCAN2, to ensure that important circuit parameters, Josephson critical current (IC), bias current (Ibias), and inductance satisfied minimal margin requirements. Critical margins of ICand Ibiaswere then further improved manually. To compensate the scattering in the circuit parameters from fabrication by design as much as possible, the critical junction parameters were optimized to further centralize the IC. The library cells were laid out following our design rules determined by systematic experiments on process control monitors (PCM). Basic cells including Josephson transmission lines, splitters, confluence buffers, D flip-flops, T flip-flops, and XOR and NDRO gates were designed, fabricated, and successfully tested at low frequencies. Wide overlaps of the operating regions for the common bias voltages were confirmed.
Low-Power Single-Flux-Quantum Standard Cell Library Using 250 A/cm2 Process for Qubit Control Applications
In this paper, we report the development of a low-power single-flux-quantum (SFQ) standard cell library and experimental results, including the cell design, high-speed test of shift-registers, delay measurement using ring oscillators, and demonstration of simple demultiplexers. We fabricated the SFQ circuits using a lowered critical current density (250 A/cm2) process and low-voltage design (0.5 or 0.1 mV). We reduced the power consumption to 1/50 or 1/250 from the conventional SFQ circuits operating at 4.2 K. We designed several essential SFQ cells, including wiring elements, flip-flops, and logic gates with the fabrication process using four planarized Nb layers and obtained the correct operation at 0.3 K. We tested 8-bit shift-registers aiming to evaluate the operating frequency of the developed SFQ cells. The 0.1-mV shift-registers operated up to 8.5 GHz. The experimental results of ring oscillators showed good agreement with the analog circuit simulation results. We believe that our experimentally-verified standard cell library is ready to use for SFQ-based digital control of qubits, such as demultiplexing of control signals, and the timing information and power consumption will be valuable information as the baseline to discuss future scalable quantum computer systems.