Recent advances in the alternating-bias-assisted annealing (ABAA) technique have successfully mitigated intrinsic Josephson-junction (JJ) fabrication variations. This new technique enables precision qubit frequency tuning alongside simplicity. However, it is critical to enhance tuning throughput and yield while investigating the factors that drive targeting performance as the technology scales. Here, we characterize ABAA tuning performance within a 150-mm wafer process flow and extend this technique to simultaneous, multi-channel tuning, demonstrating that a wafer-scale JJ resistance tuning precision of
σ=0.50±0.05% alongside a component-level yield of
≥98.8% can be achieved. Furthermore, we demonstrate a strong correlation between yield, tuning speed, and junction breakdown voltage, establishing the latter as a vital process control parameter for meeting production goals. Finally, we demonstrate a successful implementation of ABAA tuning on a quad-module quantum processor (Rigetti Cepheus-1-36Q), where we achieve an empirical frequency targeting precision of
σ∼30 MHz in both qubit and qubit-qubit detuning frequencies, contributing to high median two-qubit gate fidelities. These results confirm the efficacy and scalability of ABAA for high-precision Hamiltonian targeting, a critical enabler for modular superconducting quantum processor technology.
Fixed-frequency superconducting quantum processors are one of the most mature quantum computing architectures with high-coherence qubits and simple controls. However, high-fidelity multiqubit gates pose tight requirements on individual qubit frequencies in these processors, and these constraints are difficult to satisfy when constructing larger processors due to the large dispersion in the fabrication of Josephson junctions. In this paper, we propose a mixed-integer-programming-based optimization approach that determines qubit frequencies to maximize the fabrication yield of quantum processors. We study traditional qubit and qutrit (three-level) architectures with cross-resonance interaction processors. We compare these architectures to a differential ac-Stark shift based on entanglement gates and show that our approach greatly improves the fabrication yield and also increases the scalability of these devices. Our approach is general and can be adapted to problems where one must avoid specific frequency collisions.
The reproducibility of qubit parameters is a challenge for scaling up superconducting quantum processors. Signal cross talk imposes constraints on the frequency separation between neighboring qubits. The frequency uncertainty of transmon qubits arising from the fabrication process is attributed to deviations in the Josephson junction area, tunnel barrier thickness, and the qubit shunt capacitor. We decrease the sensitivity to these variations by fabricating larger Josephson junctions and reduce the wafer-level standard deviation in resistance down to 2%. We characterize 32 identical transmon qubits and demonstrate the reproducibility of the qubit frequencies with a 40 MHz standard deviation (i.e., 1%) with qubit quality factors exceeding 2 million. We perform two-level-system (TLS) spectroscopy and observe no significant increase in the number of TLSs causing qubit relaxation. We further show by simulation that for our parametric-gate architecture, and accounting only for errors caused by the uncertainty of the qubit frequency, we can scale up to 100 qubits with an average of only three collisions between quantum-gate transition frequencies, assuming
2 cross talk and
99.9 target gate fidelity.