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International Conference on Noise and Fluctuations

Analysis on Noise Requirements of RF Front-End Circuits for Spin Qubit Readout

Yatao Peng, Andrea Ruffino, Edoardo Charbon A

Published Aug 22, 2019• 0 citations
Publisher

Abstract

Currently, radio frequency (RF) measurement setups for semiconductor qubits are implemented with high performance discrete devices operating at cryogenic temperatures, and the output signals are detected by room temperature instruments.This is impractical for a real quantum processor, and integrated circuits (ICs) should be designed for spin qubit readout in a practical quantum computer, to ensure system reliability and compactness.To guide the system-level IC design, we analyze in this work noise specifications of RF front-end circuits for qubit readout, mainly focusing on noise figure (NF) of the lownoise-amplifier (LNA) and phase noise (PN) of the voltage-controlled-oscillator (VCO).RF reflectometry and RF dispersive gate sensing (DGS) are two main spin qubit readout techniques, both of which should detect weak reflected signals as low as -135 dBm and distinguish <1% amplitude or phase variation, which results in high sensitivity and low noise requirements for the readout circuits, to achieve the high measurement fidelity.For the analysis, we model the RF reflectometry and RF-DGS as demodulators respectively of the on-off keying (OOK) signal and phase modulated (PM) signal from qubits.From this, we provide a first estimation of the required NF and PN for a given fidelity and readout bandwidth, as well as an insight into the relationship between phase resolution of RF-DGS and performance degradation due to PN of the VCO.We then review some state-of-the-art CMOS LNA and VCO topologies, which can be utilized in the spin qubit readout ICs to satisfy the specifications.

DOI
10.5075/epfl-iclab-icnf-269250

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Currently, radio frequency (RF) measurement setups for semiconductor qubits are implemented with high performance discrete devices operating at cryogenic temperatures, and the output signals are detected by room temperature instruments.This is impractical for a real quantum processor, and integrated circuits (ICs) should be designed for spin qubit readout in a practical quantum computer, to ensure system reliability and compactness.To guide the system-level IC design, we analyze in this work noise specifications of RF front-end circuits for qubit readout, mainly focusing on noise figure (NF) of the lownoise-amplifier (LNA) and phase noise (PN) of the voltage-controlled-oscillator (VCO).RF reflectometry and RF dispersive gate sensing (DGS) are two main spin qubit readout techniques, both of which should detect weak reflected signals as low as -135 dBm and distinguish <1% amplitude or phase variation, which results in high sensitivity and low noise requirements for the readout circuits, to achieve the high measurement fidelity.For the analysis, we model the RF reflectometry and RF-DGS as demodulators respectively of the on-off keying (OOK) signal and phase modulated (PM) signal from qubits.From this, we provide a first estimation of the required NF and PN for a given fidelity and readout bandwidth, as well as an insight into the relationship between phase resolution of RF-DGS and performance degradation due to PN of the VCO.We then review some state-of-the-art CMOS LNA and VCO topologies, which can be utilized in the spin qubit readout ICs to satisfy the specifications.
A scalable spin-qubit quantum processor requires fast, high-fidelity readout circuits operating at cryogenic temperatures (CTs). This work analyzes the radio frequency (RF) reflectometry readout mechanism to establish the link between conductance modulation, single-electron transistor (SET) matching network design, reflected signal power, and receiver (RX) noise temperature. Based on this analysis, a cryogenic RX architecture employing a passive switched-capacitor front-end is proposed. The front-end performs RF amplification and downconversion using transistors as switches, avoiding active RF amplification and mitigating shot-noise limitations. The RX is implemented in 40-nm CMOS and operates from 100 MHz to 2.2 GHz. Measurements demonstrate a minimum noise temperature of approximately 15 K at 4.2 K. When integrated with a quantum device, the RX achieves a signal-to-noise ratio (SNR) of 9.8 dB for a 10-µs integration time and enables 99.9% charge-state readout fidelity without external cryogenic amplifiers. This work represents the first demonstration of such fidelity using a cryo-CMOS RX and constitutes an important step toward scalable integration of qubit readout electronics.
Continuous rounds of quantum error correction (QEC) are essential to achieve fault-tolerant quantum computers (QCs). In each QEC cycle, thousands of ancilla quantum bits (qubits) must be read out faster than the qubits’ decoherence time (≫T2∗∼120μs(\gg \mathrm{T}_{2} * \sim 120 \mu \mathrm{s}(≫T2​∗∼120μs for spin qubits). To address this urgent need, several CMOS receivers operating at cryogenic temperatures (cryo-CMOS RXs) have recently been introduced for gate-based [1] and RF reflectometry [2] readout of spin qubits, as well as transmons’ dispersive readout [3]. However, they have a few shortcomings. First, due to the temperature-independent shot noise of transistors in nanometer CMOS technology [4], their measured noise temperature (TN)(\mathrm{T}_{{\mathrm {N}}})(TN​) is limited to 40K, thus degrading qubit readout fidelity. Second, due to their large TN, prior art showed either only the electrical performance of their chips by applying a relatively large (i.e., -85dBm [2]) modulated signal directly to the RX input [2, 3] or offered limited qubit measurements by exploiting a HEMT amplifier prior to the RX [1]. Those issues hinder future monolithic integration between solid-state qubits and readout electronics. This work advances the prior art by (1) introducing a wideband passive amplification circuit at the RX front-end to minimize the shot noise contribution of the active devices, lowering prior art TNby ∼2.7x\sim 2.7\mathrm{x}∼2.7x; (2) demonstrating the RX performance in an RF-reflectometry qubit readout scheme without using off-the-shelf LNA prior to the RX.
Accurate and low-noise generation and amplification of microwave signals are required for the manipulation and readout of quantum bits (qubits). A fault-tolerant quantum computer operates at deep cryogenic temperatures (i.e., <; 100mK) and requires thousands of qubits for running practical quantum algorithms. Consequently, CMOS radio-frequency (RF) integrated circuits operating at cryogenic temperatures down to 4 K (Cryo-CMOS) offer a higher level of system integration and scalability for future quantum computers. In this paper, we extensively discuss the role, benefits, and constraints of Cryo-CMOS for qubits control and readout. The main characteristics of the CMOS transistors and their impacts on RF circuit designs are described. Furthermore, opportunities and challenges of low noise RF signal generation and amplification are investigated.
Today’s quantum computing systems rely on commercial electronics operating at room temperature in order to perform control and readout operations for qubits [1] –[6]. The qubits operate at cryogenic temperatures; the signals that support control and readout of qubits therefore traverse multiple temperature stages in a dilution refrigerator to enable interaction with the qubits of a quantum computer. For many of the most advanced quantum computers built to date, the control of each individual qubit demands application of a radiofrequency pulse that is precisely calibrated in frequency, amplitude, and phase. Oubit readout demands the amplification of very low amplitude signals that are then post-processed to categorize the state of the qubit being measured. Oubit control electronics are implemented using arbitrary waveform generators (AWGs) of various types. The scalability of such systems is challenged by the need to scale the number of qubit control electronics units linearly with the number of qubits in the system. One approach to mitigating this challenge that is under active exploration is the use of multi-channel AWGs (tailored to the requirements of qubit control) that operate at the 4K stage of a quantum computing system [7] –[10]. Oubit readout electronics are typically implemented using multiple stages of amplification and then DSP-based readout performed at room temperature. In today’s systems, while readout electronics benefits from multiplexing of the readout signals (enabling a single cascade of moderately wideband amplifiers to support the delivery of multiple readout signals to the room-temperature electronics), again, the scalability of this approach is challenged much as is the case with control electronics. One approach to mitigating the readout challenge is the expanded use of cryogenic electronics in the readout chain. Success in the implementation of cryogenic control and readout solutions depends critically on multiple CMOS sub-components; in this paper we focus on SRAM and low noise amplifiers (LNAs). Note that SRAM is critical for both control and readout applications as a mixed-signal solution involving the combination of a custom processor and analog elements is highly desirable in both cases. Further, while the LNA is directly used as an element in the readout chain, a deep assessment of LNA performance and opportunities strongly benefits overall understanding of achievable noise performance in CMOS technologies at cryogenic temperatures and is therefore impoitant in both control and readout contexts.
A fault-tolerant quantum computer with millions of quantum bits (qubits) requires massive yet very precise control electronics for the manipulation and readout of individual qubits. CMOS operating at cryogenic temperatures down to 4 K (cryo-CMOS) allows for closer system integration, thus promising a scalable solution to enable future quantum computers. In this paper, a cryogenic control system is proposed, along with the required specifications, for the interface of the classical electronics with the quantum processor. To prove the advantages of such a system, the functionality of key circuit blocks is experimentally demonstrated. The characteristic properties of cryo-CMOS are exploited to design a noise-canceling low-noise amplifier for spin-qubit RF-reflectometry readout and a class-F2,3digitally controlled oscillator required to manipulate the state of qubits.
Quantum computers hold a promise to solve intractable problems that can not be solved with classical computers. In quantum computers, information is processed in qubits as opposed to bits. The proper operation of qubits requires them to be operated in a quantum state; hence they need to be cooled down to temperatures well below l1K. Using qubits and their quantum mechanical property, quantum computers can achieve exponential speedup in solving certain computing problems compared to classical computers. However, this can only be achieved by employing thousands of qubits. At the current state of play, quantum computers are still far from practical. The current state-of-the-art solution dictates that each qubit needs multiple interconnects towards room temperature and requires bulky room temperature instruments for qubit readout and control. Clearly, this current solution will not scale well for a quantum computer with many qubits. In an effort to solve this issue, it has been proposed to realize dedicated integrated circuits for control and readout of the qubits and operate them closer to the qubits' operating temperature to enable scalability. The thesis presents the implementation of an integrated RF receiver for spin and superconducting qubit readout applications. The work aims to replace the bulky room temperature electronics with an integrated solution that operates at 4K to enable scalability and simplification of the quantum computing architecture. The receiver has been designed in the TSMC 40nm CMOS technology and has been characterized in room temperature and 4K. The measured performance shows that the receiver features a gain of 58 dB and a minimum double-sideband noise figure of 0.6 dB at 4K with an operating frequency of 6-8 GHz; a comparable performance to the current state-of-the-art room temperature electronics used for qubit readout. Moreover, this work demonstrates a qubit readout experiment with the integrated receiver in both room temperature and 4K. The qubit readout experiment shows a comparable qubit readout performance with the integrated receiver at room temperature. However, due to oscillation problems, a degradation in qubit readout performance with the chip operating at 4K is observed.