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Bit errors and yield optimization in superconducting digital single-flux-quantum electronics

Quentin Herr

Published Jul 1, 1998• 2 citations
OpenAlex

Related papers

Principles of superconducting single-flux-quantum digital electronics

Pascal Febvre

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Superconducting single flux quantum (SFQ) circuits are promising for digital signal processing systems. However, conventional binary arithmetic does not take full advantage of the fundamental properties of SFQ circuits. The residue number system (RNS) is intrinsically more compatible with single flux quantum circuits, and provides the advantage of modularity, parallelism, carry-free structure, simple multiplication and fault tolerance. We designed a one-decimal-digit adder to demonstrate this new technology. The exclusive use of simple and robust Josephson shift registers creates large margins, simple circuit architecture and high throughput. These attributes are important for state-of-the-art superconducting technology, and are especially crucial for high temperature superconducting digital circuits. We designed, simulated and extensively optimized a mod 5 adder and its subcells. We laid out the circuits and had them fabricated. We tested the low speed functionality of these circuits using a manual test setup and a LabVIEW automated test setup. All the subcell experimental results show decent operation margins and good consistency with the simulation results, and demonstration of the entire mod 5 adder should be straightforward. An SFQ RNS 8-bit multiplier is proposed. Comparing to superconducting binary bit-serial and bit-parallel 8-bit multipliers, it shows an advantage in design simplicity, operation margins, error rate and throughput, along with its unique feature of simple fault tolerance. We thus believe that RNS, rather than binary, could be the natural language for superconducting digital electronics, especially in the application of digital signal processors.

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Yerzhan Mustafa, Selçuk Köse

Interface circuits are the key components that enable the hybrid integration of superconductor and semiconductor digital electronics. The design requirements of superconductor-semiconductor interface circuits vary depending on the application, such as high-performance classical computing, superconducting quantum computing, and digital signal processing. In this survey, various interface circuits are categorized based on the working principle and structure. The superconducting output drivers are explored, which are capable of converting and amplifying, e.g., single flux quantum (SFQ) voltage pulses, to voltage levels that semiconductor circuits can process. Several trade-offs between circuit- and system-level design parameters are examined. Accordingly, parameters such as the data rate, output voltage, power dissipation, layout area, thermal/heat load of cryogenic cables, and bit-error rate are considered.

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Error rate measurements of a Josephson single flux quantum binary ripple counter

D.J. Durand, Robert D. Sandell, Lee O. Heflinger +1 more

Single-flux quantum devices are used in superconductive analog-to-digital converters (ADCs), shift registers, and memory cells. They have been proposed for logic applications. The authors report the performance of high-speed superconducting, single-flux quantum (SFQ) ripple counters. Both memory and logic functions of the counter are investigated. Errors in logic operation produce bit error rates (BERs) as low as 0.22 errors per million binary operations, measured while counting 100-MHz pseudorandom input pulses. Errors in memory function do not occur on the time scale of the measurements. The BER is shown to be nearly independent of input bit rate and pattern, but strongly dependent on the counter cell operating point.< >

IEEE Transactions on Applied Superconductivity•Jun 1, 1992•13 citations

Extending the lifetime of a quantum bit with error correction in superconducting circuits

Nissim Ofek, Andrei Petrenko, Reinier Heeres +10 more

Nature•Jul 19, 2016•941 citations
Superconducting single flux quantum (SFQ) circuits are promising for digital signal processing systems. However, conventional binary arithmetic does not take full advantage of the fundamental properties of SFQ circuits. The residue number system (RNS) is intrinsically more compatible with single flux quantum circuits, and provides the advantage of modularity, parallelism, carry-free structure, simple multiplication and fault tolerance. We designed a one-decimal-digit adder to demonstrate this new technology. The exclusive use of simple and robust Josephson shift registers creates large margins, simple circuit architecture and high throughput. These attributes are important for state-of-the-art superconducting technology, and are especially crucial for high temperature superconducting digital circuits. We designed, simulated and extensively optimized a mod 5 adder and its subcells. We laid out the circuits and had them fabricated. We tested the low speed functionality of these circuits using a manual test setup and a LabVIEW automated test setup. All the subcell experimental results show decent operation margins and good consistency with the simulation results, and demonstration of the entire mod 5 adder should be straightforward. An SFQ RNS 8-bit multiplier is proposed. Comparing to superconducting binary bit-serial and bit-parallel 8-bit multipliers, it shows an advantage in design simplicity, operation margins, error rate and throughput, along with its unique feature of simple fault tolerance. We thus believe that RNS, rather than binary, could be the natural language for superconducting digital electronics, especially in the application of digital signal processors.
Interface circuits are the key components that enable the hybrid integration of superconductor and semiconductor digital electronics. The design requirements of superconductor-semiconductor interface circuits vary depending on the application, such as high-performance classical computing, superconducting quantum computing, and digital signal processing. In this survey, various interface circuits are categorized based on the working principle and structure. The superconducting output drivers are explored, which are capable of converting and amplifying, e.g., single flux quantum (SFQ) voltage pulses, to voltage levels that semiconductor circuits can process. Several trade-offs between circuit- and system-level design parameters are examined. Accordingly, parameters such as the data rate, output voltage, power dissipation, layout area, thermal/heat load of cryogenic cables, and bit-error rate are considered.
Single-flux quantum devices are used in superconductive analog-to-digital converters (ADCs), shift registers, and memory cells. They have been proposed for logic applications. The authors report the performance of high-speed superconducting, single-flux quantum (SFQ) ripple counters. Both memory and logic functions of the counter are investigated. Errors in logic operation produce bit error rates (BERs) as low as 0.22 errors per million binary operations, measured while counting 100-MHz pseudorandom input pulses. Errors in memory function do not occur on the time scale of the measurements. The BER is shown to be nearly independent of input bit rate and pattern, but strongly dependent on the counter cell operating point.< >