Fabrication Process for Nb-based Single Flux Quantum Circuits

Edward Leonard, Ted Thorbeck, Shaojiang Zhu +5 more

Donald L. Miller, John X. Przybysz, A. Hodge Worsham +1 more

Many applications of Single-Flux-Quantum (SFQ) circuits will rely on the transfer of multi-Gigabit per second data streams from SFQ logic to semiconductor logic for further processing. The low output voltages of superconducting circuits currently limit the data rate per channel to a few GHz. We have designed and fabricated an SFQ demultiplexer to reduce data transfer clock rates. The demultiplexer uses clocked data distribution through a binary tree architecture. The circuit was fabricated using an eight level Nb/AlO/sub x//Nb process and tested at 4.2 K.

Mutsuo Hidaka, Shuichi Nagasawa, T. Satoh +2 more

The Superconductivity Research Laboratory has successfully fabricated large quantities of single flux quantum (SFQ) large scale integrated circuits, including several thousands of Josephson junctions (JJs). Using a Jc = 2.5 kA cm−2 process in which the number of Nb layers was four and the minimum JJ size was 2 µm square. We developed a new advanced fabrication process that produced a Jc = 10 kA cm−2, nine Nb layers and a minimum JJ size of 1 µm square. The increase in the number of Nb layers was achieved by using a planarization technique. The target of our next generation process is a Jc = 40 kA cm−2 with a 0.5 µm square for the minimum junction size. This specification will be achieved by using advanced semiconductor technologies. This process will enable SFQ circuits to be produced with one million JJs on a chip and achieve a clock frequency greater than 100 GHz.

Hiroyuki Akaike, Masamitsu Tanaka, Kazumasa Takagi +12 more

Masamitsu Tanaka, Yoshihiro Kitagawa, T. Satoh +1 more

Superconductor single-flux-quantum (SFQ) integrated circuits can provide classical, general-purpose digital processing at cryogenic temperature near quantum bits. We report high-frequency operation of low-power SFQ circuits using a lowered critical current density fabrication process and low-voltage design. We are developing a standard-cell library with integrated devices featuring four planarized Nb layers and a Pd resistor layer. SFQ shift registers successfully operated at up to 11 GHz at 0.3 K. The measured operating frequency is sufficient for SFQ-based digital controlling of quantum bits using impulse-shaped voltage pulses.

David I. Olaya, Paul D. Dresselhaus, P. F. Hopkins +1 more