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Bulletin of the American Physical Society

Quantum Circuit Designs for Gate Model Quantum Computers

László Gyöngyösi, Sándor Imre

Published Mar 5, 2018• 0 citations
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Quantum Circuit Designs for Gate-Model Quantum Computer Architectures.

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The power of quantum computers makes it possible to solve difficult problems more efficiently than is possible with traditional computers. Gate-model quantum computers provide an experimentally implementable architecture for quantum circuit computations. Here, we demonstrate an automated method for designing quantum circuits for experimental gate-model quantum computers. We define the Quantum Triple Annealing Minimization (QTAM) algorithm, which provides an automated quantum circuit minimization on the physical layout (circuit depth and area), quantum wire length minimization of the quantum circuit, Hamiltonian minimization, and the minimization of the input size and output measurements. We define a multilayer structure for quantum circuit computations using the hardware restrictions on the connection topology of gate-model quantum computers. The results can be straightforwardly applied to near term gate-model quantum computers.

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Abstract-Quantum theory of computation establishes that there are problems for which quantum algorithms are far more efficient than their classical counterpart. Advances in quantum computing have initiated the design of systems based on quantum logic gates. Quantum computer hardware being primarily available in research laboratories at present, it mandates the ability to design, develop and test quantum logic operations by simulation of quantum logic circuits on classical computers. In this paper, we have defined a programming model for the design of a quantum circuit simulator, which can simulate a given quantum circuit obeying the rules of quantum gate operations. The quantum gate operations on both pure and superposed quantum states are being done with the help of effective data structures. The proposed quantum circuit simulator also incorporates the simulation of quantum circuit error under the action of certain quantum faults.

•Aug 19, 2013•1 citation
The power of quantum computers makes it possible to solve difficult problems more efficiently than is possible with traditional computers. Gate-model quantum computers provide an experimentally implementable architecture for quantum circuit computations. Here, we demonstrate an automated method for designing quantum circuits for experimental gate-model quantum computers. We define the Quantum Triple Annealing Minimization (QTAM) algorithm, which provides an automated quantum circuit minimization on the physical layout (circuit depth and area), quantum wire length minimization of the quantum circuit, Hamiltonian minimization, and the minimization of the input size and output measurements. We define a multilayer structure for quantum circuit computations using the hardware restrictions on the connection topology of gate-model quantum computers. The results can be straightforwardly applied to near term gate-model quantum computers.
Gate-model quantum computers provide an experimentally implementable architecture for near-term quantum computations. To design a reduced quantum circuit that can simulate a high-complexity reference quantum circuit, an optimization should be taken on the number of input quantum states, on the unitary operations of the quantum circuit, and on the number of output measurement rounds. Besides the optimization of the physical layout of the hardware layer, the quantum computer should also solve difficult computational problems very efficiently. To yield a desired output system, a particular objective function associated with the computational problem fed into the quantum computer should be maximized. The reduced gate structure should be able to produce the maximized value of the objective function. These parallel requirements must be satisfied simultaneously, which makes the optimization difficult. Here, we demonstrate a method for designing quantum circuits for gate-model quantum computers and define the Quantum Triple Annealing Minimization (QTAM) algorithm. The aim of QTAM is to determine an optimal reduced topology for the quantum circuits in the hardware layer at the maximization of the objective function of an arbitrary computational problem.
Abstract-Quantum theory of computation establishes that there are problems for which quantum algorithms are far more efficient than their classical counterpart. Advances in quantum computing have initiated the design of systems based on quantum logic gates. Quantum computer hardware being primarily available in research laboratories at present, it mandates the ability to design, develop and test quantum logic operations by simulation of quantum logic circuits on classical computers. In this paper, we have defined a programming model for the design of a quantum circuit simulator, which can simulate a given quantum circuit obeying the rules of quantum gate operations. The quantum gate operations on both pure and superposed quantum states are being done with the help of effective data structures. The proposed quantum circuit simulator also incorporates the simulation of quantum circuit error under the action of certain quantum faults.