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Quantum Circuit Designs for Gate-Model Quantum Computer Architectures.

László Gyöngyösi

Published Mar 6, 2018• 4 citations
OpenAlex

Abstract

The power of quantum computers makes it possible to solve difficult problems more efficiently than is possible with traditional computers. Gate-model quantum computers provide an experimentally implementable architecture for quantum circuit computations. Here, we demonstrate an automated method for designing quantum circuits for experimental gate-model quantum computers. We define the Quantum Triple Annealing Minimization (QTAM) algorithm, which provides an automated quantum circuit minimization on the physical layout (circuit depth and area), quantum wire length minimization of the quantum circuit, Hamiltonian minimization, and the minimization of the input size and output measurements. We define a multilayer structure for quantum circuit computations using the hardware restrictions on the connection topology of gate-model quantum computers. The results can be straightforwardly applied to near term gate-model quantum computers.

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•Jan 1, 2014•2 citations
The power of quantum computers makes it possible to solve difficult problems more efficiently than is possible with traditional computers. Gate-model quantum computers provide an experimentally implementable architecture for quantum circuit computations. Here, we demonstrate an automated method for designing quantum circuits for experimental gate-model quantum computers. We define the Quantum Triple Annealing Minimization (QTAM) algorithm, which provides an automated quantum circuit minimization on the physical layout (circuit depth and area), quantum wire length minimization of the quantum circuit, Hamiltonian minimization, and the minimization of the input size and output measurements. We define a multilayer structure for quantum circuit computations using the hardware restrictions on the connection topology of gate-model quantum computers. The results can be straightforwardly applied to near term gate-model quantum computers.
Gate-model quantum computers provide an experimentally implementable architecture for near-term quantum computations. To design a reduced quantum circuit that can simulate a high-complexity reference quantum circuit, an optimization should be taken on the number of input quantum states, on the unitary operations of the quantum circuit, and on the number of output measurement rounds. Besides the optimization of the physical layout of the hardware layer, the quantum computer should also solve difficult computational problems very efficiently. To yield a desired output system, a particular objective function associated with the computational problem fed into the quantum computer should be maximized. The reduced gate structure should be able to produce the maximized value of the objective function. These parallel requirements must be satisfied simultaneously, which makes the optimization difficult. Here, we demonstrate a method for designing quantum circuits for gate-model quantum computers and define the Quantum Triple Annealing Minimization (QTAM) algorithm. The aim of QTAM is to determine an optimal reduced topology for the quantum circuits in the hardware layer at the maximization of the objective function of an arbitrary computational problem.
Quantum computers utilize the fundamentals of quantum mechanics to solve computational problems more efficiently than traditional computers. Gate-model quantum computers are fundamental to implement near-term quantum computer architectures and quantum devices. Here, a quantum algorithm is defined for the circuit depth reduction of gate-model quantum computers. The proposed solution evaluates the reduced time complexity equivalent of a reference quantum circuit. We prove the complexity of the quantum algorithm and the achievable reduction in circuit depth. The method provides a tractable solution to reduce the time complexity and physical layer costs of quantum computers.
Abstract We develop and implement automated methods for optimizing quantum circuits of the size and type expected in quantum computations that outperform classical computers. We show how to handle continuous gate parameters and report a collection of fast algorithms capable of optimizing large-scale quantum circuits. For the suite of benchmarks considered, we obtain substantial reductions in gate counts. In particular, we provide better optimization in significantly less time than previous approaches, while making minimal structural changes so as to preserve the basic layout of the underlying quantum algorithms. Our results help bridge the gap between the computations that can be run on existing hardware and those that are expected to outperform classical computers.
Quantum electronic circuits where the logic information is processed and stored in single flux quanta promise efficient computation in a performance/power metric, and thus are of utmost interest as possible replacement or enhancement of CMOS. Several electronic device families leverage superconducting materials and transitions between resistive and superconducting states. Information is coded into bits with deterministic values - as opposed to qubits used in quantum computing. As an example, information can be coded into pulses. Logic gates can be modeled as finite-state machines, that emit logic outputs in response to inputs. The most natural realization of such circuits is through synchronous implementations, where a clock stimulus is transmitted to every logic gate and where logic depth is balanced at every input to achieve full synchrony. Novel superconducting realization families try to go beyond the limitations of synchronous logic with approaches reminiscent of asynchronous design style and leveraging information coding. Moreover, some superconducting families exploit adiabatic operation, in the search for minimizing energy consumption. Design automation for quantum electronic logic families is still in its infancy, but important results have been achieved in terms of automatic balancing and fanout management. The combination of these problems with logic restructuring poses new challenges, as the overall problem is more complex as compared to CMOS and algorithms and tools cannot be just adapted. This presentation will cover recent advancement in design automation for superconducting electronic circuits as well as address future developments in the field.
Gate-model quantum computers, including IBM and IonQ, have gained considerable attention as backbones for implementing near-term quantum computer architectures and quantum devices. Their performances rely on circuit depths, whose minimization ensures optimal results and reduced noises. We develop an algorithm which rearranges the terms in the quadratics of the QUBO model and the Ising model, when implementing the Quantum Approximate Optimization Algorithm for the Hamiltonian of a linear system. We test the algorithm on IBM quantum computer and IBM simulator to verify the effectiveness of our algorithm for minimizing circuit depths.
Simulating quantum mechanical evolutions in general is difficult on classical computers because the size of the Hilbert space grows exponentially with the number of particles involved in the simulations. However, a quantum computer, which obeys the laws of quantum mechanics, is believed to perform such simulations more efficiently. The time evolution operator, a unitary matrix, of a quantum system acts as a quantum gate changing the state of the system in time. Therefore, any computation on quantum computers can be interpreted as a unitary transformation on quantum state vectors. Generally, quantum gates are sufficiently simple operations so as to avoid difficulty in the physical implementation. The implementation of a general given computation represented by a unitary matrix on quantum computers requires finding an array of elementary quantum gates describing the desired computation. This describes a matrix decomposition problem known as the quantum circuit design problem. In this dissertation, we address the following questions concerning quantum circuit designs: How hard is it to find suitable quantum circuits for a given computation? What are the possible circuit design methods? How do we apply these to simulations of quantum problems, in particular quantum chemistry problems? To answer these questions, we categorize methods for designing quantum circuits as evolutionary algorithms and deterministic methods. We apply our developed group leaders optimization algorithm, an evolutionary algorithm, to find quantum circuits for known quantum algorithms and the simulation of molecular Hamiltonians. Then, we present a deterministic circuit design approach to produce universal circuits, which can be programmable. Moreover, we show how to use these programmable circuit designs within the quantum phase estimation algorithm to find eigenvalues of nonunitary matrices and study resonances in quantum systems. Finally, the quantum phase estimation algorithm is employed to efficiently solve ranking problems: in particular, multiple network alignment is considered to find the similarities between protein-protein interaction networks and molecular networks.