International Conference on Information and Communication Technology Convergence (ICTC)
Circuit depth reduction algorithm for QUBO and Ising models in gate-model quantum computers
Sun Woo Park, Hyunju Lee, Byung Chun Kim, Youngho Woo, Kyungtaek Jun
Abstract
Gate-model quantum computers, including IBM and IonQ, have gained considerable attention as backbones for implementing near-term quantum computer architectures and quantum devices. Their performances rely on circuit depths, whose minimization ensures optimal results and reduced noises. We develop an algorithm which rearranges the terms in the quadratics of the QUBO model and the Ising model, when implementing the Quantum Approximate Optimization Algorithm for the Hamiltonian of a linear system. We test the algorithm on IBM quantum computer and IBM simulator to verify the effectiveness of our algorithm for minimizing circuit depths.