As scaling of CMOS slows down, there is growing interest in alternative technologies that can improve performance and energy-efficiency. Superconducting circuits based on Josephson Junctions (JJ) is an emerging technology that provides devices which can be switched with pico-second latencies and consumes two orders of magnitude lower switching energy compared to CMOS. While JJ-based circuits can operate at high frequencies and are energy-efficient, the technology faces three critical challenges: limited device density and lack of area-efficient technology for memory structures, low gate fanout, and new failure modes of Flux-Traps that occurs due to the operating environment.
As scaling of CMOS slows down, there is growing interest in alternative technologies that can improve performance and energy-efficiency. Superconducting circuits based on Josephson Junctions (JJ) is an emerging technology that provides devices which can be switched with pico-second latencies and consumes two orders of magnitude lower switching energy compared to CMOS. While JJ-based circuits can operate at high frequencies and are energy-efficient, the technology faces three critical challenges: limited device density and lack of area-efficient technology for memory structures, low gate fanout, and new failure modes of Flux-Traps that occurs due to the operating environment.
Superconductive logic based on Josephson junctions (JJ) is a promising technology for energy efficient supercomputers and cloud computing. This technology can deliver significant improvements in performance and energy efficiency as compared to CMOS. Superconductive circuits, however, suffer from low density integration as compared to CMOS, primarily due to the limited scalability of the inductors. To improve the scalability of superconductive logic, a logic family based on a novel JJ technology,$2\phi $-JJ, has been proposed that eliminates the inductors. In this brief, three circuits are presented which exploit this scalable inductor-less technology. This novel$2\phi $-JJ technology represents the data as half flux quantum (HFQ) pulses, which improves the energy efficiency and speed as compared to standard superconductive logic such as rapid single flux quantum (RSFQ). Unlike RSFQ, the proposed circuits dynamically switch upon receiving an HFQ pulse, saving energy. These$2\phi $-JJ logic circuits operate 2.25X faster and require 2.6X less energy as compared to RSFQ.
Superconducting logic circuits based on Josephson junctions (JJ) are the fastest, lowest power solid state digital circuit technology known. Large scale integration of such circuits has also been demonstrated. By contrast, current superconducting memory circuits based on flux quantization are not equivalently advanced. Very dense memory chips have not been possible to date and seem unlikely to come without new invention. The goal of this project was to explore alternative approaches to memory that would be compatible with Josephson junction logic circuits and capable of much denser memory arrays. Five new approaches were investigated ranging from modification to the current approach, use of semiconductor CMOS and wholly new concepts based on new physical principles. Three of these were identified as worth pursuing. They are use of cooled CMOS, use of cryogenic hybrid JJ/CMOS memory concepts and a totally new magnetoresistive approach to memory based on the superconductor/ferromagnet proximity effect.
Low energy dissipation and ability to operate at low temperatures provide for Josephson junction circuits a niche as a support for low temperature devices. With high speed operation (Chen W. et al., 1999) capability the Josephson junction circuits make a prime candidate for applications which are difficult to engineer with existing CMOS technology. The development of Josephson junction technology took a major turn for the better with the invention of the Rapid-Single-Flux-Quantum (RSFQ) devices (Likharev K.K. et al., 1991), an improvement over voltage biased Josephson Junctions logic which were plagued with the junction switching and reset problems. The modern applications of SFQ circuits extend to a larger range of temperature operation and the applications vary from low temperature magnetic sensor, to high speed mixed signal circuits, voltage and current standards (Turner C.W. et al., 1998), and auxiliary components for quantum computing circuits. Most of the SFQ circuits are fabricated with Niobium, but Aluminum based circuits are being used for quantum gates (Nielsen M.A. et al., 2000) and qubit operations. SFQ circuits based on Magnesium di-Boride junctions are being developed for higher temperature operations (Tahara S. et al., 2004). Predominantly most of the Josephson junction circuits today are operated at around 4K. All the circuits are optimized usually for liquid helium temperatures, so the circuits operated in helium bath Dewars or cryostat's do not experience any temperature gradients or drift effects which can affect the operating margins. With the improvement in the fabrication technology and soft-wares for SFQ circuit technology, the designing complex circuits have become easier. Complex Circuits with over 20K junctions such digital synthesizer and digital RF Trans-receiver have already been demonstrated (Oleg M.A. et al., 2011). Development of circuits over 100K junctions are actively under progress. However, with enormously large circuits, power requirements also increase. Looking at the range of applications and complexity of the problems of energy minimization, we try to look at the problem in two approaches. One for large complex circuits, we try to reduce the power bias itself, or the overall load of current that is supplied
Superconducting digital pulse-conserving logic and Josephson static random access memory (JSRAM) memory together enable scalable circuits with energy efficiency 100× beyond leading-node CMOS. Circuit designs support high throughput and low latency when implemented in an advanced fabrication stack with high-critical-current-density Josephson junctions of 1000 μA/μm2. Pulse-conserving logic produces one single-flux-quantum output for each input and includes a three-input, three-output gate producing logical or3, majority3, and and3. Gate macros using dual-rail data encoding eliminate inversion latency and produce efficient implementations of all standard logic functions. A full adder using 70 Josephson junctions has a carry-out latency of 5 ps corresponding to an effective 12 levels of logic at 30 GHz. JSRAM memory uses single-flux-quantum signals throughout an active array to achieve throughput at the same clock rate as the logic. The unit cell has eight Josephson junctions, a signal propagation latency of 1 ps, and a footprint of 2 μm2. Projected density of JSRAM is 4 MB/cm2, and computational density of pulse-conserving logic is on par with leading node CMOS accounting for power densities and clock rates.
The potential of a new technology, based on the superconducting Josephson tunneling effect, has been assessed for use in high-speed computer systems. Josephson tunneling circuits for memory and logic functions can be switched at sub-nanosecond delay, do not require standby power, and dissipate extremely low energy, typically less than 10-13joule during fast switching operation. High-speed circuits with high packing densities, not limited by power dissipation problems, can therefore be expected. Low thermal noise at cryogenic temperatures ensures reliable operation despite the low energy switching signal. Practically lossless signal transmission via superconducting lines can be exploited for high-speed operation even when sizeable memory and logic modules are assembled. Two random access memory modules have been designed on the basis of single device experiments. Operational characteristics leading to the conclusion that 30 Mbit capacity, less than 1 watt refrigeration requirement (at 3.6° K) and cycle times of 40 ns (in one case) and 15 ns (in the second case), can be achieved are presented.
The lack of dense, fast, energy efficient memory has been the main detractor for multiple superconducting digital projects in the past. Recently, fundamental physics research in superconductor-ferromagnet thin-film tunnel structures created a new opportunity to solve this long-standing problem. Superconductivity and ferromagnetism, two deeply antagonistic electronic properties, can co-exist in form of Magnetic Josephson Junctions (MJJs). The superconducting-ferromagnetic MJJs are electrically compatible with traditional superconductor-insulator-superconductor (SIS) Josephson junctions (JJs) used for digital energy-efficient single flux quantum (eSFQ/ERSFQ) circuits. Both MJJ and JJ circuits have similar fabrication process and can be integrated on a single chip. As a result, a combination of MJJs and JJs can be used to form addressable memory cells, energy-efficient memory periphery circuits and programmable logic elements. In this paper, we present the test results of superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs showing their applicability for superconducting spintronic memory and digital circuits.