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IEEE Transactions on Magnetics

Potential of superconductive josephson tunneling technology for ultrahigh performance memories and processors

W. Anacker

Published Dec 1, 1969• 72 citations
Publisher

Abstract

The potential of a new technology, based on the superconducting Josephson tunneling effect, has been assessed for use in high-speed computer systems. Josephson tunneling circuits for memory and logic functions can be switched at sub-nanosecond delay, do not require standby power, and dissipate extremely low energy, typically less than 10-13joule during fast switching operation. High-speed circuits with high packing densities, not limited by power dissipation problems, can therefore be expected. Low thermal noise at cryogenic temperatures ensures reliable operation despite the low energy switching signal. Practically lossless signal transmission via superconducting lines can be exploited for high-speed operation even when sizeable memory and logic modules are assembled. Two random access memory modules have been designed on the basis of single device experiments. Operational characteristics leading to the conclusion that 30 Mbit capacity, less than 1 watt refrigeration requirement (at 3.6° K) and cycle times of 40 ns (in one case) and 15 ns (in the second case), can be achieved are presented.

DOI
10.1109/tmag.1969.1066654

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Technical digest -- IEEE Compound Semiconductor Integrated Circuit Symposium•Nov 23, 2002•1 citation
The potential of a new technology, based on the superconducting Josephson tunneling effect, has been assessed for use in high-speed computer systems. Josephson tunneling circuits for memory and logic functions can be switched at sub-nanosecond delay, do not require standby power, and dissipate extremely low energy, typically less than 10-13joule during fast switching operation. High-speed circuits with high packing densities, not limited by power dissipation problems, can therefore be expected. Low thermal noise at cryogenic temperatures ensures reliable operation despite the low energy switching signal. Practically lossless signal transmission via superconducting lines can be exploited for high-speed operation even when sizeable memory and logic modules are assembled. Two random access memory modules have been designed on the basis of single device experiments. Operational characteristics leading to the conclusion that 30 Mbit capacity, less than 1 watt refrigeration requirement (at 3.6° K) and cycle times of 40 ns (in one case) and 15 ns (in the second case), can be achieved are presented.
The superconducting tunnel effect predicted by Brian Josephson in 1962 is looking increasingly promising for another very practical application—as logic and memory circuits for computers. Josephson-junction circuits are capable of high switching speeds (50–100 picosec have already been obtained). And because such circuits operate at voltages comparable to the superconducting energy gap, the heat generated is typically microwatts, thousands of times lower than high-speed transistor circuits. The diminished heat-removal problem allows one to pack the Josephson circuits much closer than semiconductor circuits. Once high switching speeds are achieved, this packability becomes extremely important because then the major limitation on computer speed is how fast the electrical signal takes to move from one circuit to another.
Experimental superconducting Josephson devices being investigated for use in digital logic and memory circuits have been demonstrated to switch in the 10 to 100 picosecond (1 picosecond = 10-12 sec) range. Projections based on the operation of individual logic circuits indicate that they may surpass semiconductor circuits in very high performance CPU's. This potential is based on the fact that these circuits dissipate extremely little energy, on the order of 10 to 1000 attojoules (attojoule = 10-18 joule), while operating with subnanosecond delays. It should, therefore, be possible to package Josephson devices very densely and interconnect them by properly terminated superconducting transmission lines so that the fast switching speed of individual circuits is retained throughout large logic networks.
Experimental superconducting Josephson devices being investigated for use in digital logic and memory circuits have been demonstrated to switch in the 10 to 100 picosecond (1 picosecond = 10-12 sec) range. Projections based on the operation of individual logic circuits indicate that they may surpass semiconductor circuits in very high performance CPU's. This potential is based on the fact that these circuits dissipate extremely little energy, on the order of 10 to 1000 attojoules (attojoule = 10-18 joule), while operating with subnanosecond delays. It should, therefore, be possible to package Josephson devices very densely and interconnect them by properly terminated superconducting transmission lines so that the fast switching speed of individual circuits is retained throughout large logic networks.
Abstract : Lack of high-density, fast and memory has been a long-standing problem in superconducting digital electronics. Alternative Josephson-junction-based memory cells and peripheral circuits have intrinsic problems which impede the application of that kind of memory. The CMOS-Josephson hybrid memory idea was proposed in 1992 to circumvent this problem. In the present work we have designed and demonstrated a 64-kb CMOS-Josephson hybrid memory working at 1 GHz. In order to make the hybrid idea practical, a complete and comprehensive 4 K short-channel CMOS model for digital circuits was developed for this dissertation. It has been used in the design of the memory core and peripheral circuits. A fast hybrid interface circuit that transforms single-flux-quantum millivolt 2-ps pulse signals to CMOS volt-level signals has been studied and the optimized design has been completed. Using a nonvolatile cryogenic 3-T DRAM cell, the memory core is designed in such a way that the access time is much less than for room-temperature operation, not only because of the performance upgrade due to the temperature decrease but also because of a different reading mechanism. Fabricated by commercial submicron CMOS processes (0.25 microns and 0.18 microns) and a Nb/AlOx/Nb Josephson-junction process with 2.5 kA/cm2 tunneling current density, the memory chips were bonded together by direct wire-bonding and by flip-chip bump-bonding and tested at low frequencies, high frequencies, respectively. A subnanosecond access time is obtained both from simulations and experiments. The power for an interface circuit is measured to be 0.6 mW. The memory core consumes even less power. The total power consumption depends on the operation mode of the memory and is calculated to be 10 mW for reading and 28 mW for writing. Simulations also indicate that, with more advanced semiconductor and superconductor technologies, larger and faster hybrid memories are expected to be achievable in the future.
Flux quantum logic and memory circuits using superconducting Josephson tunnel junctions have high-speed switching times (approximately 1 ps), low power dissipation (< 1 (mu) W per circuit) and low levels of thermally induced electrical noise. Current designs of such circuits employ single trilayer junctions, which impose circuit size and logic threshold limitations. A new design component, the multilayered tunnel junction, consists of a vertically stacked array (a 1D superlattice) of Josephson tunnel junctions. The introduction of multilayered junctions into superconducting electronic circuitry offers a reduction in the current device size, fault tolerances, and new device applications. We present numerical simulations of simple circuits employing multilayered Josephson junctions as design components. Comparison with conventional single flux quantum circuitry is discussed. We also present preliminary measurements of multilayered Josephson junctions fabricated for use in flux quantum devices.
Superconductive electronics offers a unique combination of high bandwidth and low power for mission critical hardware such as digital processors at 20 to 100 GHz, microwatt per bit analog to digital converters, large digital switches at multi-Gb/s data rates, and low noise parametric amplifiers. This cryogenic technology, typically operating at a few degrees or a few tens of degrees Kelvin, depends upon the unique physics of superconducting materials such as Nb, NbN, and YBaCuO, and the fundamental circuit element, the Josephson junction (JJ) to create unique architectures of unprecedented design efficiency and performance. These circuits are based on the single flux quantum (SFQ) logic family, a technology that has no parallel in semiconductor electronics. Digital data is transmitted by voltage pulses with amplitude less than 1 mV, but at extremely high speeds. Individual gates have been operated as high as 370 GHz. In this paper, we present a brief overview of superconductive digital technology, describe some recent circuits, and discuss how the challenges to superconductive technology are being met, including the use of multi-chip module (MCM) technology, and the potential use of III-V HBT and HEMT circuits to provide interface drivers and amplifiers, possibly operated cryogenically.