We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tuneable transmon qubits with nearest-neighbor coupling. An eight-qubit unit cell forms the basis for repeating both the quantum hardware and coherent control, enabling spatial multiplexing. This control uses three fixed frequencies for all single-qubit gates and a unique frequency detuning pattern for each qubit in the cell. By pipelining the interaction and readout steps of ancilla-based X- and Z-type stabilizer measurements, we can engineer detuning patterns that avoid all second-order transmon-transmon interactions except those exploited in controlled-phase gates, regardless of fabric size. Our scheme is applicable to defect-based and planar logical qubits, including lattice surgery.
We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tuneable transmon qubits with nearest-neighbor coupling. An eight-qubit unit cell forms the basis for repeating both the quantum hardware and coherent control, enabling spatial multiplexing. This control uses three fixed frequencies for all single-qubit gates and a unique frequency detuning pattern for each qubit in the cell. By pipelining the interaction and readout steps of ancilla-based X- and Z-type stabilizer measurements, we can engineer detuning patterns that avoid all second-order transmon-transmon interactions except those exploited in controlled-phase gates, regardless of fabric size. Our scheme is applicable to defect-based and planar logical qubits, including lattice surgery.
Facilitating the ability to achieve logical qubit error rates below physical qubit error rates, error correction is anticipated to play an important role in scaling quantum computers. While many algorithms require millions of physical qubits to be executed with error correction, current superconducting qubit systems contain only hundreds of physical qubits. One of the most promising codes on the superconducting qubit platform is the surface code, requiring a realistically attainable error threshold and the ability to perform universal fault-tolerant quantum computing with local operations via lattice surgery and magic state injection. Surface code architectures easily generalize to single-chip planar layouts, however space and control hardware constraints point to limits on the number of qubits that can fit on one chip. Additionally, the planar routing on single-chip architectures leads to serialization of commuting gates and strain on classical decoding caused by large ancilla patches. A distributed multi-chip architecture utilizing the surface code can potentially solve these problems if one can optimize inter-chip gates, manage collisions in networking between chips, and minimize routing hardware costs. We propose QuIRC, a superconducting Quantum Interface Routing Card for Lattice Surgery between surface code modules inside of a single dilution refrigerator. QuIRC improves scaling by allowing connection of many modules, increases ancilla connectivity of surface code lattices, and offers improved transpilation of Pauli-based surface code circuits. QuIRC employs in-situ Entangled Pair (EP) generation protocols for communication. We explore potential topological layouts of QuIRC based on superconducting hardware fabrication constraints, and demonstrate reductions in ancilla patch size by up to 77.8%, and in layer transpilation size by 51.9% when compared to the single-chip case.
Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of 0.0365(2) and 0.0282(1), respectively, after leakage events are rejected. By leveraging joint initialization and lattice splitting, we deterministically prepare a logical Bell state, confirming genuine bipartite entanglement via the error-corrected logical state fidelity. We further execute a two-qubit Deutsch-Jozsa algorithm at the logical level to demonstrate algorithmic utility in a fault-tolerant framework. Finally, to achieve universal control, we implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the logical X axis. For the logical RX(π/4) gate, we achieve a logical gate fidelity of 0.943−9+10 conditioned on the absence of detected errors. These results establish lattice surgery as a practical and versatile paradigm for logical computation in near-term surface-code architectures, representing a critical milestone toward scalable fault-tolerant quantum advantage in superconducting circuits.
Quantum error correction will be a necessary component towards realizing scalable quantum computers with physical qubits. Theoretically, it is possible to perform arbitrarily long computations so long as the error rate is below a threshold value. The two-dimensional surface code permits relatively high fault-tolerant thresholds at the ∼ 1% level, and only requires a latticed network of qubits with nearest-neighbor interactions. I will discuss our implementation of a sub-section of the larger fabric using three transmon qubits and two linking microwave resonators. We demonstrate high-fidelity control over the sub-section surface code strand, verified via quantum prcoess tomography and randomized benchmarking experiments. Our fixed-frequency qubit approach relies on the two-qubit cross-resonance microwave driving interaction, which is now one of many microwave-based entangling gate protocols. I will also discuss the prospects to scale to surface code plaquette level experiments.
Low-overhead quantum error-correction schemes are essential for enabling quantum computation on registers containing multiple logical qubits. For planar architectures with limited nearest-neighbor qubit connectivity, the surface code has emerged as the leading paradigm. Recent theoretical and experimental work has shown that a physical-qubit connectivity of degree three is sufficient to implement fault-tolerant quantum error correction. In this work, we study lattice surgery in the context of such trivalent architectures and introduce scalable circuit constructions to implement it. Compared with the four-valent measurement scheme, the trivalent lattice-surgery protocol reduces the required resources by O(d) qubits out of a total qubit count of O(d2) and by O(d) two-qubit gates out of a total two-qubit gate count of O(d3). We benchmark the logical fidelity of both lattice-surgery schemes in terms of experimentally realistic simulations targeting an implementation with a fluxonium qubit based architecture and find a potential improvement of up to ≈25% for distance-three. These results open a way for scalable planar trivalent qubit architectures to host a surface-code-based logical quantum processor.
Superconducting circuits have been demonstrated at the ~50 qubit scale, with gate fidelities approaching the thresholds required for error correction using surface codes. It is generally considered that maintaining and improving this performance while scaling to >100 qubits will require 3D integration of control wiring, and techniques to prevent or mitigate the effects of unwanted electromagnetic modes which emerge in the circuit environment at larger scales. At the present time, no single design has emerged as the clear scaling "winner'', and many different modalities are being explored. In this thesis, we describe one potential scaling architecture for superconducting circuits, which is based on a unit cell containing a set of controllable, measurable qubits. In analogy to the unit cell of a crystal, this unit cell can be tiled, in this case to form 2D arrays of individually controllable and measurable qubits. This is enabled by three key technologies: 3D integrated off-chip control wiring, reverse-side readout resonators, and inductive shunting of the device enclosure with micromachined pillars. To validate this approach, we design and build a demonstration device featuring four transmon qubits and containing within it a single unit cell of the architecture. The device construction involves the fabrication of reverse-side circuits and the use of novel CNC drilling of the circuit substrate. We measure coherence times and single-qubit gate fidelities comparable with the state-of-the-art for transmon qubits (avg. T1 = 149 µs, avg. echoed pure dephasing T2 = 189 µs, avg. F > 99.98%), establishing that the design is compatible with high coherence. An important feature of the design is that the infinite construct formed by tiling the plane with the unit cell possesses a cutoff frequency, below which the circuit environment cannot sustain any electromagnetic modes. We develop models to predict this cutoff frequency, and predict that environment mediated crosstalk between qubits inside this structure decays exponentially with spatial separation. This crosstalk can be viewed as being mediated by evanescent waveguide modes, or by bound states formed by the interaction of qubits with the environmental modes around the cutoff. Both models provide quantitative predictions for the rate of crosstalk decay, which are shown to be in good agreement. We propose this architecture as a promising candidate for building 2D arrays of hundreds or thousands of nearest neighbour coupled superconducting qubits, which could provide a testbed of quantum error correction schemes such as the surface code.
Superconducting qubits arrays have become one of the most promising architectures for the practical implementation of universal quantum computing with quantum error correction codes. Here we propose a defect-tolerant surface code topology which is resistant to sparse fabrication defects. The topology is equivalent to a disk folded into N layers. A physically defective qubit can be replaced with a working physical qubit within the same unit cell from a different layer. Thereby sparse fabrication errors can be collected into one sacrificial layer and isolated from the working layers by turning off their controllable couplers. We propose two schemes to realize this robust topology. One is to use flux qubits, and the other is based on Xmon qubits. A modified quantum circuit for the stabilization cycle of the Xmon qubits scheme is developed. We calculate and compare the per-operation error thresholds for these two schemes and find that the error threshold for the modified quantum circuit is close to that for the original stabilization cycle. A possible way to implement the intersecting connections between different Xmon qubits on the circuit level is also provided.