Atomic ions trapped in microfabricated surface traps can be utilized as a physical platform with which to build a quantum computer. They possess many of the desirable characteristics of such a device, including high fidelity state preparation and readout, universal logic gates, and long coherence times, and can be readily entangled with each other through photonic interconnects. The use of optical cavities integrated with trapped ion qubits as a photonic interface presents the possibility for order of magnitude improvements in performance in several key areas for their use in quantum computation. The first part of this thesis describes the design and fabrication of a novel surface trap for integration with an optical cavity. The trap is custom made on a highly reflective mirror surface and includes the capability of moving the ion trap location along all three trap axes with nanometer scale precision. The second part of this thesis demonstrates the suitability of small microcavities formed from laser ablated, fused silica substrates with radii of curvature in the 300-500 micron range for use with the mirror trap as part of an integrated ion trap cavity system. Quantum computing applications for such a system include dramatic improvements in the photon entanglement rate of up to 10 kHz, the qubit measurement time down to 1 microsecond, and the qubit measurement error rate down to the 1e-5 range. The final part of this thesis describes a performance simulator for exploring the physical resource requirements and performance demands to scale a quantum computer to sizes capable of implementing quantum algorithms beyond the limits of classical computation.
Atomic ions trapped in microfabricated surface traps can be utilized as a physical platform with which to build a quantum computer. They possess many of the desirable characteristics of such a device, including high fidelity state preparation and readout, universal logic gates, and long coherence times, and can be readily entangled with each other through photonic interconnects. The use of optical cavities integrated with trapped ion qubits as a photonic interface presents the possibility for order of magnitude improvements in performance in several key areas for their use in quantum computation. The first part of this thesis describes the design and fabrication of a novel surface trap for integration with an optical cavity. The trap is custom made on a highly reflective mirror surface and includes the capability of moving the ion trap location along all three trap axes with nanometer scale precision. The second part of this thesis demonstrates the suitability of small microcavities formed from laser ablated, fused silica substrates with radii of curvature in the 300-500 micron range for use with the mirror trap as part of an integrated ion trap cavity system. Quantum computing applications for such a system include dramatic improvements in the photon entanglement rate of up to 10 kHz, the qubit measurement time down to 1 microsecond, and the qubit measurement error rate down to the 1e-5 range. The final part of this thesis describes a performance simulator for exploring the physical resource requirements and performance demands to scale a quantum computer to sizes capable of implementing quantum algorithms beyond the limits of classical computation.
The major challenges in trapped-ion quantum computation are to scale up few-ion experiments to many qubits and to improve control techniques so that quantum logic gates can be carried out with higher fidelities. This thesis reports experimental progress in both of these areas. In the early part of the thesis we describe the fabrication of a surface-electrode ion trap, the development of the apparatus and techniques required to operate it and the successful trapping of 40Ca+ ions. Notably we developed methods to control the orientation of the principal axes and to minimise ion micromotion. We propose a repumping scheme that simplifies heating rate measurements for ions with low-lying D levels, and use it to characterise the electric field noise in the trap. Surface-electrode traps are important because they offer a route to dense integration of electronic and optical control elements using existing microfabrication technology. We explore this scaling route by testing a series of three traps that were microfabricated at Sandia National Laboratories. Investigations of micromotion and charging of the surface by laser beams were carried out and improvements to future traps are suggested. Using one of these traps we also investigated anomalous electrical noise from the electrode surfaces and discovered that it can be reduced by cleaning with a pulsed laser. A factor of two decrease was observed; this represents the first in situ removal of this noise source, an important step towards higher gate fidelities. In the second half of the thesis we describe the design and construction of an experiment for the purpose of replacing laser-driven multi-qubit quantum logic gates with microwave-driven ones. We investigate magnetic-field-independent hyperfine qubits in 40Ca+ as suitable qubits for this scheme. We make a design study of how best to integrate an ion trap with the microwave conductors required to implement the gate and propose a novel integrated resonant structure. The trap was fabricated and ions were successfully loaded. Single-qubit experiments show that the microwave fields above the trap are in excellent agreement with software simulations. There are good prospects for demonstrating a multi-qubit gate in the near future. We conclude by discussing the possibilities for larger-scale quantum computation by combining microfabricated traps and microwave control.
While quantum information processing offers a tantalizing possibility of a significant speedup in execution of certain algorithms, as well as enabling previously unmanageable simulations of large quantum systems, it remains extremely difficult to realize experimentally. Recently, fundamental building blocks of a quantum computer, including one and two qubit gates, teleportation and error correction, were demonstrated using trapped atomic ions. Scaling to a larger number of qubits requires miniaturization of the ion traps, currently limited by the sharply increasing motional state decoherence at sub-100 μm ion-electrode distances. This thesis explores the source and suppression of this decoherence at cryogenic temperatures, and demonstrates fundamental logic gates in a surface electrode ion trap.
Construction of the apparatus requires the development of a number of experimental techniques. Design, numerical simulation and implementation of a surface electrode ion trap is presented. Cryogenic cooling of the trap to near 4 K is accomplished by contact with a bath cryostat. Ions are loaded by ablation or photoionization, both of which are characterized in terms of generated stray fields and heat load.
The bulk of new experimental results deals with measurements of electric field noise at the ion's position. Upon cooling to 6 K, the measured rates are suppressed by up to 7 orders of magnitude, more than two orders of magnitude below previously published data for similarly sized traps operated at room temperature. The observed noise depends strongly on fabrication process, which suggests further improvements are possible. The measured dependence of the electric field noise on temperature is inconsistent with published models, and can be explained using a continuous spectrum of activated fluctuators.
The fabricated surface electrode traps are used to demonstrate coherent operations and the classical control required for trapped ion quantum computation. The necessary spectral properties of coherent light sources are achieved with a novel design using optical feedback to a triangular, medium finesse, cavity, followed by electronic feedback to an ultra-high finesse reference cavity. Single and two qubit operations on a single ion are demonstrated with classical fidelity in excess of 95%. Magnetic field gradient coils built into the trap allow for individual addressing of ions, a prerequisite to scaling to multiple qubits. (Copies available exclusively from MIT Libraries, Rm. 14-0551, Cambridge, MA 02139-4307. Ph. 617-253-5668; Fax 617-253-1690.)
Among the various physical systems for quantum bit (qubit) implementation, trapped ion has drawn significant attention due to its long coherence time (in the second range) and high gate fidelity (>99.99% for single qubit gate). After years of careful development, the ion trap, from mechanically assembled linear trap to lithography-defined surface electrode ion trap, is compatible with CMOS fabrication, which opens the door for the high-resolution, high-repeatability and large-scale ion trap manufacturing. To date, the number of fully connected ion qubits in state-of-the-art ion trapping devices is ~10. However, to scale close to or even beyond the noisy intermediate-scale quantum regime (NISQ, ~100 ions), some challenges remain. One such challenge is to maintain the delicate control of multiple components over individual ion with increasing ion number. In such context, this thesis is committed to boost the scalability of ion trap by integrating advanced 3D interconnects (e.g., through silicon via) and other functional modules (e.g., silicon photonics and multilayer metallization). 3D interconnects are integrated in the half space underneath surface electrode, to replace conventional wire bonding that extends out of the surface. Silicon photonics (grating coupler and waveguide) in place of bulk optics and lenses are used for on-chip light routing and emission. Multilayer metallization is used to maintain the overall RF performance and enable high-density interconnection where necessary. Firstly, surface electrode ion traps on different substrates (namely high resistivity silicon, silicon with grounding plane and glass) are designed and fabricated. Standard CMOS back-end-of-line fabrication process on 12-inch wafer platform is employed. The electrical performances of different traps are compared in terms of leakage current (I-V), parasitic capacitance (C-V), on-chip RF loss (S-parameter) and post-packaging resonance. Though the leakage (at the order of 10-8 A) between neighboring electrodes is relatively high, ion trap on glass substrate demonstrates extremely small capacitance (<1 pF) and low RF loss (insertion loss of <0.05 dB at RF frequency of 50 MHz), as compared to the silicon counterparts. This is mainly due to excellent insulation property of glass. Following that, ion trapping test is performed on the glass trap and ions are successfully confined with an averaged lifetime of ~30 minutes (compatible with the 10-11 mbar vacuum level (10-13 Pa)). To simultaneously leverage the dielectric property of glass and the microfabrication compatibility of silicon, the integration of silicon ion trap and glass interposer is performed, between which TSV is used to build the vertical interconnection. Due to the incorporation of TSV, the original wire bonding pads as well as the connection circuits on the surface electrodes can be eliminated. As a result, the form factor of TSV integrated trap is reduced by ~10 times. Correspondingly, the parasitic capacitance between neighboring electrodes is reduced from >24 pF to 3 pF. Similarly, the insertion loss of TSV integrated trap drops to 0.11 dB, in sharp comparison to the previous traps on silicon substrates (up to 2.4 dB). Analytical models are built to respectively characterize the electrode capacitance and overall power loss, and a good agreement is achieved between the model and the measurement result. In addition, since TSV is located in the half space underneath the surface electrodes, the electrodes geometry design is enabled with high flexibility. Meanwhile, the laser obstruction issue due to the stick-out bonding wires has been resolved. In terms of the ion trapping performance, both the heating rate (17 quanta/ms for an axial frequency of 300 kHz) and the lifetime (~30 minutes) of TSV trap are comparable with non-cryogenic traps of similar dimensions. Moreover, a customized CPGA with patterned redistribution layer is used to locate TSV integrated trap directly in the absence of glass interposer, facilitating high-efficiency thermal management and upgrading the packaging flexibility. At the next stage, the co-integration of other functional modules such as silicon photonics and multilayer metallization with TSV trap is investigated. In silicon photonics module, waveguide and grating coupler are on-chip introduced in place of bulk optics to achieve localized light routing and emission. In multilayer metallization module, as a first step, a grounding plane is incorporated into TSV trap to shield the silicon substrate from RF signal, in which specific windows are patterned onto the plane to accommodate TSV and allow the transmission of lights. The compatibility between TSV/multilayer metallization and waveguide/grating coupler for electrical and optical (E/O) signal routing is demonstrated. The preliminary test result based on wafer frontside shows that a ~40% capacitance reduction is achieved, and the insertion loss further drops to 0.06 dB, close to the performance of glass trap. In addition, the simulation results on photonics components indicate that an overall coupling efficiency of <30 dB is obtained from the input fiber to the ion through the photonics circuit. However, the measured power loss for light with wavelength of 1092 nm is as high as 50 dB. The deviation between the simulation and measurement is largely due to the fabrication imperfection and the resultant sloped grating coupler profile. This thesis focuses on the scalability enhancement of ion trap by integrating TSV, silicon photonics and multilayer metallization into conventional ion trap. The results are promising and pave the way for the future large scale quantum computing based on trapped ion.
Quantum technology has made great strides in the last two decades with trapped ions demonstrating all the necessary building blocks for a quantum computer. While these proof of principle experiments have been demonstrated, it still remains a challenging task to scale these experiments down to smaller systems. In this thesis I describe the development of technology towards scalable cryogenic ion trapping and quantum hybrid systems. I first discuss the fundamentals of ion trapping along with the demonstration of ion trapping on a novel surface electrode ion trap with a ring shaped architecture. I then present the development of a cryogenic vacuum system for ion trapping at ~4 K, which utilizes a closed cycle Gifford McMahon cryocooler with a helium gas buffered ultra-low vibration interface to mechanically decouple a ultra-high vacuum system. Ancillary technologies are also presented, including a novel in-vacuum superconducting rf resonator, low power dissipation ceramic based atomic source oven and an adaptable in-vacuum permanent magnet system for long-wavelength based quantum logic. The design and fabrication of microfabricated surface ion traps toward quantum hybrid technologies are then presented. A superconducting ion trap with an integrated high quality factor microwave cavity and vertical ion shuttling capabilities is described. The experimental demonstration of the cavity is also presented with quality factors of Q6~6000 and Q~15000 for superconducting niobium nitride and gold based cavities respectively, which are the highest demonstrated for microwave cavities integrated within ion trapping electrode architectures. An ion trap with a multipole electrode geometry is then presented, which is capable of trapping a large number of ions simultaneously. The homogeneity of five individual linear trapping regions are optimized and the design for the principle axis rotation of each linear region is presented. An overview of microfabrication techniques used for fabricating surface electrode ion traps is then presented. This includes the detailed microfabrication procedure for ion traps designed within this thesis. A scheme for the integration of ion trapping and superconducting qubit systems as a step towards the realization of a quantum hybrid system is then presented. This scheme addresses two key diffculties in realizing such a system; a combined microfabricated ion trap and superconducting qubit architecture, and the experimental infrastructure to facilitate both technologies. Solutions that can be immediately implemented using current technology are presented. Finally, as a step towards scalability and hybrid quantum systems, the interaction between a single ion and a microwaves field produced from an on chip microwave cavity is explored. The interaction is described for the high-Q microwave cavity designed in this thesis and a 171Yb+ion. A description of the observable transmission from the cavity is described and it is shown that the presence of a single ion can indeed be observed in the emission spectrum of high-Q microwave cavity even in the weak coupling regime.
Trapped atomic ions are the leading candidate to act as individual quantum bits in a large quantum information processing system. Ion traps can be conformed to a two-dimensional surface, which provides a way to increase the number of ions while maintaining the ability to move individual ions in a two-dimensional grid. However, surface traps tend to suffer from shallow trap depths and higher motional heating rates. In this work, we report the design, fabrication, and testing of a simple gold-on-fused-silica ion trap optimized for a deep trapping potential and stable motional modes. The desirable trap characteristics include long lifetime, fully-compensated micromotion, and high secular trap frequencies that were measured using a trapped and cooled 174 Yb + ion. This trap design can be integrated with an optical cavity to enhance the ion-photon coupling.
Trapped ions within Paul traps have shown to be a promising architecture in the realisation of a quantum information processor together with the ability of providing quantum simulations. Linear Paul traps have demonstrated long coherence times with ions being well isolated from the environment, single and multi-qubit gates and the high fidelity detection of states. The scalability to large number of qubits, incorporating all the previous achievements requires an array of linear ion traps. Microfabrication techniques allow for fabrication and micron level accuracy of the trap electrode dimensions through photolithography techniques. The first part of this thesis presents the experiential setup and trapping of Yb+ ions needed to test large ion trap arrays. This include vacuum systems that can host advanced symmetric and asymmetric ion traps with up to 90 static voltage control electrodes. Demonstration of a single trapped Yb+ ion within a two-layer macroscopic ion trap is presented. with an ion-electrode distance of 310(10) µm. The anomalous heating rate and spectral noise density of the trap was measured, a main form of decoherence within ion traps. The second half of this thesis presents the design and fabrication of multi-layer asymmetric ion traps. This allows for isolated electrodes that cannot be accessed via surface pathways, allowing for higher density of electrodes as well as creating novel trap designs that allow for the potential of quantum simulations to be demonstrated. These include two-dimensional lattices and ring trap designs in which the isolated electrodes provide more control in the ion position. For the microfabrication of these traps I present a novel high-aspect ratio electroplated electrode design that provides shielding of the dielectric layer. This provides a means to mitigate stray electric field due to charge build up on the dielectric surfaces. Electrical testing of the trap structures was performed to test bulk breakdown and surface flashover of the ion trap architectures. Results showed sufficient isolation between electrodes for both radio frequency and static breakdown. Surface flashover voltage measurements over the dielectric layer showed an improvement of more than double over previous results using a new fabrication technique. This will allow for more powerful ion trap chips needed for the next generation of microfabricated ion trap arrays for scalable quantum technologies.