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Experimental demonstration of single-flux-quantum sequential-access mask ROM

Yoshinao Mizugaki, Kazunao Sawada, Tomoki Watanabe, Hiroshi Shimada

Published Jan 1, 2016• 0 citations
Publisher

Abstract

We present a superconducting single-flux-quantum (SFQ) mask ROM comprising 2-bit storage cells and a sequential-access driver. Four types of storage cells for 2-bit data (“00,” “10,” “01,” “11”) are adopted for reduction of the cell dimensions, whereas the sequential access is suitable for a single-chip quantum voltage waveform generator implemented with an SFQ-based digital-to-analog converter. 2-bit storage cells of 60 × 70 µm2 are fabricated using a niobium integration technology and tested in liquid helium. Operation of a sequential-access mask ROM with data of 8 bits × 6 words is also demonstrated.

DOI
10.1587/elex.13.20160342

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We present a superconducting single-flux-quantum (SFQ) mask ROM comprising 2-bit storage cells and a sequential-access driver. Four types of storage cells for 2-bit data (“00,” “10,” “01,” “11”) are adopted for reduction of the cell dimensions, whereas the sequential access is suitable for a single-chip quantum voltage waveform generator implemented with an SFQ-based digital-to-analog converter. 2-bit storage cells of 60 × 70 µm2 are fabricated using a niobium integration technology and tested in liquid helium. Operation of a sequential-access mask ROM with data of 8 bits × 6 words is also demonstrated.
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Abstract One of the unique applications of single-flux-quantum (SFQ) circuitry is a digital-to-analog converter (DAC) of which the output voltage is defined by the Josephson effect. Recently, we have designed and operated rapid single-flux-quantum (RSFQ) DACs with frequency modulation of SFQ pulse sequences. In this paper, we report our design and test results of a 4-bit RSFQ-DAC based on the configuration of the “sum of selected bits sequence (Σ-SBS)”. By adjusting the timing margins, in addition to the fabrication using the Nb integration process with the critical current density as high as 10 kA/cm2, the maximum output voltage up to 260 μV was demonstrated.
Maximum-length sequences (M-sequences) are known as pseudo-random numbers generated with relatively simple digital circuits. In this paper, we present a single-flux-quantum digital circuit that generated three output bits of a 4-bit M-sequence in one clock operation. The circuit comprised three clocked exclusive-or gates, one delay flip-flop, three dc/SFQ converters (for set, reset, and low-frequency clock signals), and three SFQ/dc converters (for three parallel outputs), all of which were integrated on a superconducting Nb chip. A 10-GHz clock generator was also implemented for high-speed testing. The total number of Nb/AlOx/Nb Josephson junctions was 568. Verilog simulation demonstrated correct circuit operation with a 20-GHz clock, which corresponded to the generation rate of 60 Gb/s. The measurement was carried out in a liquid helium bath. Low-speed testing with a 1-kHz clock demonstrated periodic signals of three parallelized 4-bit M-sequence. We also confirmed that the outputs were correctly shifted when 13 clock signals of 10 GHz were fed between two 1-kHz clock signals.
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Residue number system (RNS) arithmetic has a promising role for fault-tolerant high throughput superconducting single flux quantum (SFQ) circuits for digital signal processing (DSP) applications. We have designed one of the basic computational blocks used in DSP circuits, one-decimal-digit RNS adder. A new design for its main component, the single-modulus adder, has been developed. It combines simple and robust RSFQ elementary cells, both combinational and sequential. The central units are a circular shift register, a code converter, and the clock control circuitry. Our mod5 adder employs 195 Josephson junctions, consumes 50 μW of power, and occupies an area of less than 2 mm2. Chips were fabricated at HYPRES, Inc. using 1 kA/cm2 low-Tc Niobium technology. The mod5 adder was successfully tested at low speed, and gave experimental bias margins of ±26%.