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ML-performance of low-density parity check codes

Heidi Steendam, Marc Moeneclaey

Published Jan 1, 2002• 5 citations
OpenAlex

Abstract

In this paper, we derive the maximum likelihood (ML) performance for low-density parity check (LDPC) codes, considering BPSK and QPSK transmission over a Gaussian channel.We compare the theoretical ML performance with the performance of the iterative decoding algorithm.It turns out that the performance of the iterative decoding algorithm is close to the ML performance when the girth of the code is sufficiently high.When the girth of the code is equal to or smaller than 6, the decoding algorithm performs sub-optimal: the bit error rate (BER) obtained with the iterative decoding algorithm is much higher than the optimal BER that can be obtained when using ML decoding.

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Error correcting coding has become one essential part in nearly all the modern data transmission and storage systems.Low density parity check (LDPC) codes are a class of linear block code has the superior performance closer to the Shannon's limit.In this paper two error correcting codes from the family of LDPC codes specifically Euclidean Geometry Low Density Parity Check (EG-LDPC) codes and Nonbinary low density parity check (NB-LDPC) codes are compared in terms of power consumption, number of iterations and other parameters.For better performance of EG-LDPC codes, Maximum Likelihood (ML) Algorithm was proposed.NB-LDPC codes can provide better error correcting performance with an average of 10 to 30 iterations but has high decoding complexity which can be improve by EG-LDPC codes with ML algorithm having only three iterations for detecting and correcting errors.One step majority logic decodable (MLD) codes is a subclass of EG-LDPC codes are used to avoid high decoding complexity.The power Consumed by NB-LDPC codes is 2.729W whereas the power consumed by EG-LDPC codes with ML algorithm is 1.148W.

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PERFORMANCE COMPARISON OF EG-LDPC CODES WITH MAXIMUM LIKELIHOOD ALGORITHM OVER NON-BINARY LDPC CODES

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ABSTRACT Error correcting coding has become one essential part in nearly all the modern data transmission and storage systems. Low density parity check (LDPC) codes are a class of linear block code has the superior performance closer to the Shannon’s limit. In this paper two error correcting codes from the family of LDPC codes specifically Euclidean Geometry Low Density Parity Check (EG-LDPC) codes and Nonbinary low density parity check (NB-LDPC) codes are compared in terms of power consumption, number of iterations and other parameters. For better performance of EG-LDPC codes, Maximum Likelihood (ML) Algorithm was proposed. NB-LDPC codes can provide better error correcting performance with an average of 10 to 30 iterations but has high decoding complexity which can be improve by EG-LDPC codes with ML algorithm having only three iterations for detecting and correcting errors. One step majority logic decodable (MLD) codes is a subclass of EG-LDPC codes are used to avoid high decoding complexity. The power Consumed by NB-LDPC codes is 2.729W whereas the power consumed by EG-LDPC codes with ML algorithm is 1.148W. KEYWORDS Euclidean Geometry - Low Density Parity Check code, Maximum Likelihood Algorithm, Non Binary - Low Density Parity Check Code.

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Techniques for the decoding of low density parity check codes: efficient simulation, algorithm improvement and implementation

Babak Daneshrad, Enver Çavuş

After the introduction of iterative coding, Low Density Parity Check (LDPC) codes have received a lot of attention due to their remarkable near Shannon-limit performance and practical decoder implementation. However, when employing an LDPC code for various applications, multiple issues do arise at the simulation, algorithm and implementation levels. The first issue is the performance evaluation of the iterative LDPC decoder in the very low Bit Error Rate (BER) regions. So far, no analytical tool has been developed to evaluate the performance of LDPC codes. Unfortunately standard Monte Carlo (MC) simulations cannot be used for performance estimation in these low BER regions due to prohibitive execution times. The second issue is the efficiency of the decoding algorithm. Due to the presence of short cycles in the bipartite graph, sum-product decoding algorithms lead to considerable performance loss for short block-length LDPC codes and produce error floors for longer codes. In addition, the iterative processing and estimation of soft probabilistic values with these algorithms result in very high computational complexity, which in turn impedes the adoption of LDPC codes for power constrained systems. Another prime objective is to design a high throughput decoder architecture which is capable of supporting multiple rates and variable code lengths within minimal area. This work aims to address and provide solutions to the above problems. As a solution to the performance estimation problem of LDPC codes, a highly efficient and novel fast BER simulation technique is developed. At the algorithm level, a performance improvement and error floor avoidance method is introduced, and a computationally efficient algorithm is developed for the sum-product decoding of LDPC codes. And finally, at the architecture level, a high throughput multi-rate variable code length implementation is presented which, when implemented, efficiently minimizes device resources while alleviating the routing complexity of the decoder.

•Jan 1, 2007•2 citations
In this paper, we derive the maximum likelihood (ML) performance for low-density parity check (LDPC) codes, considering BPSK and QPSK transmission over a Gaussian channel.We compare the theoretical ML performance with the performance of the iterative decoding algorithm.It turns out that the performance of the iterative decoding algorithm is close to the ML performance when the girth of the code is sufficiently high.When the girth of the code is equal to or smaller than 6, the decoding algorithm performs sub-optimal: the bit error rate (BER) obtained with the iterative decoding algorithm is much higher than the optimal BER that can be obtained when using ML decoding.
This paper investigates decoding of low-density parity-check (LDPC) codes over the binary erasure channel (BEC). We study the iterative and maximum-likelihood (ML) decoding of LDPC codes on this channel. We derive bounds on the ML decoding of LDPC codes on the BEC. We then present an improved decoding algorithm. The proposed algorithm has almost the same complexity as the standard iterative decoding. However, it has better performance. Simulations show that we can decrease the error rate by several orders of magnitude using the proposed algorithm. We also provide some graph-theoretic properties of different decoding algorithms of LDPC codes over the BEC which we think are useful to better understand the LDPC decoding methods, in particular, for finite-length codes.
Error correcting coding has become one essential part in nearly all the modern data transmission and storage systems.Low density parity check (LDPC) codes are a class of linear block code has the superior performance closer to the Shannon's limit.In this paper two error correcting codes from the family of LDPC codes specifically Euclidean Geometry Low Density Parity Check (EG-LDPC) codes and Nonbinary low density parity check (NB-LDPC) codes are compared in terms of power consumption, number of iterations and other parameters.For better performance of EG-LDPC codes, Maximum Likelihood (ML) Algorithm was proposed.NB-LDPC codes can provide better error correcting performance with an average of 10 to 30 iterations but has high decoding complexity which can be improve by EG-LDPC codes with ML algorithm having only three iterations for detecting and correcting errors.One step majority logic decodable (MLD) codes is a subclass of EG-LDPC codes are used to avoid high decoding complexity.The power Consumed by NB-LDPC codes is 2.729W whereas the power consumed by EG-LDPC codes with ML algorithm is 1.148W.
The performance of maximum-likelihood (ML) decoding on the binary erasure channel for finite-length low-density parity-check (LDPC) codes from two random ensembles is studied. A tightened union-type upper bound on the ML decoding error probability based on the precise coefficients of the average weight spectrum is presented. For LDPC codes from the Gallager ensemble and the Richardson-Urbanke ensemble, new upper bounds on the ML decoding performance based on computing the rank of submatrices of the code parity-check matrix are derived. A new lower bound on the ML decoding threshold followed from the latter error probability bound is obtained. An improved lower bound on the error probability for codes with a known estimate on the minimum distance is presented as well. A new low-complexity near-ML decoding algorithm for quasi-cyclic LDPC codes is proposed and simulated. Its performance is compared to the simulated belief propagation and ML decoding performance and simulated performance of the best known improved iterative decoding techniques, as well as, with the derived upper bounds on the ML decoding performance and with decoding thresholds obtained by the density evolution technique.
ABSTRACT Error correcting coding has become one essential part in nearly all the modern data transmission and storage systems. Low density parity check (LDPC) codes are a class of linear block code has the superior performance closer to the Shannon’s limit. In this paper two error correcting codes from the family of LDPC codes specifically Euclidean Geometry Low Density Parity Check (EG-LDPC) codes and Nonbinary low density parity check (NB-LDPC) codes are compared in terms of power consumption, number of iterations and other parameters. For better performance of EG-LDPC codes, Maximum Likelihood (ML) Algorithm was proposed. NB-LDPC codes can provide better error correcting performance with an average of 10 to 30 iterations but has high decoding complexity which can be improve by EG-LDPC codes with ML algorithm having only three iterations for detecting and correcting errors. One step majority logic decodable (MLD) codes is a subclass of EG-LDPC codes are used to avoid high decoding complexity. The power Consumed by NB-LDPC codes is 2.729W whereas the power consumed by EG-LDPC codes with ML algorithm is 1.148W. KEYWORDS Euclidean Geometry - Low Density Parity Check code, Maximum Likelihood Algorithm, Non Binary - Low Density Parity Check Code.
Low-Density Parity-Check (LDPC) codes are error correcting codes with good performance in communications systems. LDPC codes, however, have heavy computational complexity. In this paper, we find out how many iterations are required for sufficient performance of LDPC codes. The Additive White Gaussian Noise (AWGN) channel model and a log-domain Sum-Product (SP) algorithm are used. Experiments measure Bit Error Rate (BER) at each iteration in given SNRs. The result of performance evaluation, the best performance is showed when the number of iteration is 25 at 5 ㏈.
After the introduction of iterative coding, Low Density Parity Check (LDPC) codes have received a lot of attention due to their remarkable near Shannon-limit performance and practical decoder implementation. However, when employing an LDPC code for various applications, multiple issues do arise at the simulation, algorithm and implementation levels. The first issue is the performance evaluation of the iterative LDPC decoder in the very low Bit Error Rate (BER) regions. So far, no analytical tool has been developed to evaluate the performance of LDPC codes. Unfortunately standard Monte Carlo (MC) simulations cannot be used for performance estimation in these low BER regions due to prohibitive execution times. The second issue is the efficiency of the decoding algorithm. Due to the presence of short cycles in the bipartite graph, sum-product decoding algorithms lead to considerable performance loss for short block-length LDPC codes and produce error floors for longer codes. In addition, the iterative processing and estimation of soft probabilistic values with these algorithms result in very high computational complexity, which in turn impedes the adoption of LDPC codes for power constrained systems. Another prime objective is to design a high throughput decoder architecture which is capable of supporting multiple rates and variable code lengths within minimal area. This work aims to address and provide solutions to the above problems. As a solution to the performance estimation problem of LDPC codes, a highly efficient and novel fast BER simulation technique is developed. At the algorithm level, a performance improvement and error floor avoidance method is introduced, and a computationally efficient algorithm is developed for the sum-product decoding of LDPC codes. And finally, at the architecture level, a high throughput multi-rate variable code length implementation is presented which, when implemented, efficiently minimizes device resources while alleviating the routing complexity of the decoder.