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IEEE Transactions on Applied Superconductivity

SFQ control circuits for Josephson junction qubits

Vasili K. Semenov, D. V. Averin

Published Jun 1, 2003• 68 citations
Publisher

Abstract

Devices of three types: magnetic pulse generators, read-out circuits, and digital circuits controlling them are needed to support scalable operation of quantum logic based on the Josephson junction qubits. The most natural framework for implementation of such a classical interface to quantum circuits is provided by the RSFQ technology . In this work, we argue, however, that specific qubit requirements can not be satisfied with the conventional RSFQ approach and describe the necessary modifications. We suggest a new structure of the pulse generator based on two long underdamped Josephson junctions which is characterized by the reduced power consumption and reduced output noise. We also show how to trade off power consumption and speed of the digital control circuits by using Josephson junctions with similar values of the shunt resistors but very different critical currents. Finally, we suggest a new read-out circuit which enables dynamic compensation of the backaction down to the level approaching fundamental quantum-mechanical limit.

DOI
10.1109/tasc.2003.814114

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Devices of three types: magnetic pulse generators, read-out circuits, and digital circuits controlling them are needed to support scalable operation of quantum logic based on the Josephson junction qubits. The most natural framework for implementation of such a classical interface to quantum circuits is provided by the RSFQ technology . In this work, we argue, however, that specific qubit requirements can not be satisfied with the conventional RSFQ approach and describe the necessary modifications. We suggest a new structure of the pulse generator based on two long underdamped Josephson junctions which is characterized by the reduced power consumption and reduced output noise. We also show how to trade off power consumption and speed of the digital control circuits by using Josephson junctions with similar values of the shunt resistors but very different critical currents. Finally, we suggest a new read-out circuit which enables dynamic compensation of the backaction down to the level approaching fundamental quantum-mechanical limit.
We report low-power single-flux-quantum (SFQ) circuits fabricated with a lowered critical current density process and low-voltage design. We selected 250 A/cm2^{2}2to obtain 2–10 μA Josephson junctions (JJs) easily using conventional facilities. Our numerical simulation shows that the expected operating frequency is 10 GHz and that we can reduce the bias voltage to 0.1–0.5 mV; power consumption can be reduced to around 1 nW per JJ. We newly developed a fabrication process featuring four planarized Nb layers and a Pd resistor layer. We obtained the correct operation of several basic SFQ circuit elements designed with the lowered critical currents to 1/2 of the conventional circuits at 4.2 K. We also evaluated the Josephson junction critical currents, specific capacitance, resistance, and inductance at 3 K and 300 mK. We observed an increase of 7% in the critical currents at 300 mK, while the other parameters were unchanged. We demonstrated a 0.5-mV Josephson transmission line where we lowered the critical currents to 1/10. We expect such low-power SFQ circuits to operate at 20 mK, providing classical, general-purpose digital processing near quantum bits.
The digital circuits in a superconducting quantum computer must be cooled to cryogenic temperatures in a dilution refrigerator for control and information readout of the qubit information. Because the dilution refrigerator's heat capacity is limited, extremely low-power digital circuits are required. Single-flux-quantum (SFQ) circuits and Josephson photomultipliers (JPMs) are expected to serve as control and readout circuits for superconducting quantum computers. These circuits generate minimal heat, but further reductions in power consumption are required to make it possible to build larger, more scalable faulttolerant quantum computers (FTQC). In this paper, we propose a low-power and reliable peripheral circuit for JPM-based qubit readout utilizing an SFQ counter circuit. The counter performs majority voting across repeated readouts, significantly improving the reliability of the JPM readout process. Additionally, we quantitatively evaluate switching errors in SFQ circuits using Josephson junctions with low-critical current values. By integrating these circuit techniques and simulation results, we find that the proposed approach achieves a 90% reduction in power consumption while effectively suppressing the increase in readout error.
An integrated circuit including all basic components of the recently suggested Resistive Single Flux Quantum (RSFQ) logic family has been designed, fabricated and tested successfully. The circuit includes a generator of periodic SFQ pulses, four buffer/amplifier stages for splitting, channeling and regeneration of the pulses, a detector/load stage, and universal RSFQ logic gate (here performing the NOT function). The 10μm design rule circuit employs 13 active Nb - Al2O3- Nb Josephson junctions with the critical current density ∼ 0.5 kA/cm2. externally shunted by Mo resistors with R 1 Ohm. The shunting provided critical damping of the junctions (\beta_{c}\lsim 1) and reasonable (\sim 500 \muV) IcR product. The circuit operation has been tested by measurement of dc voltages\bar{V}_{i}across various Josephson junctions as functions of the dc current through the pulse generator. Correct and stable operation of the circuit for the clock frequencies from 0 to ∼30 GHz has been demonstrated.
A new family of dc-powered Josephson junction digital devices, the Rapid Single Flux Quantum (RSFQ) logic, is described. The devices use overdamped Josephson junctions and two-junction interferometers to store, pass and process the digital information presented in form of single flux quanta. We have carried out extensive numerical simulation of the dynamics of the RSFQ logic gates and of some more complex circuits including serial full adder and reversible shift register, within the standard microscopic-theory ("Werthamer") description of Josephson junctions. The minimum clock cycles of the basic RSFQ circuits turn out to be as small as 2.5 ps. The most promising ways to use the RSFQ logic circuits at the present stage of development of the Josephson junction digital technology are discussed.
We report energy reduction in low-voltage rapid single-flux-quantum (LV-RSFQ) circuits using shunt-resistor-free Josephson junctions. The LV-RSFQ logic is one of energy-efficient derivatives of rapid single-flux-quantum (RSFQ) logic, which operates in a constant voltage mode. By lowering bias voltages, we can reduce power consumption at bias resistors which account for more than 90% of total power consumption, and also reduce the energy dynamically consumed during switching events because of slower transition of superconductor phase. Voltage drops across Josephson junctions cause a complicated trade-off between operation speed and power consumption. In this paper, we evaluated shunt-resistor-free LV-RSFQ shift-registers in terms of operation speed, power consumption, and energy-efficiency. Numerical simulation revealed their faster operation by up to 50% and accordingly higher energy-efficiency. Experimental results showed that a 0.5mV shift-register had superiority in operation speed and energy-efficiency.
Superconductive logic based on Josephson junctions (JJ) is a promising technology for energy efficient supercomputers and cloud computing. This technology can deliver significant improvements in performance and energy efficiency as compared to CMOS. Superconductive circuits, however, suffer from low density integration as compared to CMOS, primarily due to the limited scalability of the inductors. To improve the scalability of superconductive logic, a logic family based on a novel JJ technology,$2\phi $-JJ, has been proposed that eliminates the inductors. In this brief, three circuits are presented which exploit this scalable inductor-less technology. This novel$2\phi $-JJ technology represents the data as half flux quantum (HFQ) pulses, which improves the energy efficiency and speed as compared to standard superconductive logic such as rapid single flux quantum (RSFQ). Unlike RSFQ, the proposed circuits dynamically switch upon receiving an HFQ pulse, saving energy. These$2\phi $-JJ logic circuits operate 2.25X faster and require 2.6X less energy as compared to RSFQ.