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IEEE Transactions on Applied Superconductivity

On using finite segment methods and images to establish the effect of gate structures on inter-junction inductances in RSFQ circuits

Coenrad Johann Fourie, Willem Jakobus Perold

Published Jun 1, 2003• 7 citations
Publisher

Abstract

Several programs exist that calculate inductance in line structures. Some can even handle corners and holes in the ground plane. However, real structures in superconducting electronics are often more complex, and more elaborate techniques are needed to provide a reliable estimate of inductance, especially over very short intra-gate distances. A technique implemented with a modified version of FastHenry is discussed, whereby any inter-junction inductance in RSFQ circuits, in the vicinity of complex three-dimensional structures, junction cover pads and damping resistors, can be estimated. Placement of the reflection plane for the method of images is also discussed, together with the effect of segmentation size, and various results presented.

DOI
10.1109/tasc.2003.813927

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Several programs exist that calculate inductance in line structures. Some can even handle corners and holes in the ground plane. However, real structures in superconducting electronics are often more complex, and more elaborate techniques are needed to provide a reliable estimate of inductance, especially over very short intra-gate distances. A technique implemented with a modified version of FastHenry is discussed, whereby any inter-junction inductance in RSFQ circuits, in the vicinity of complex three-dimensional structures, junction cover pads and damping resistors, can be estimated. Placement of the reflection plane for the method of images is also discussed, together with the effect of segmentation size, and various results presented.
We have measured the inductances of various structures used in Josephson junction devices and circuits by means of a novel differential inductance measurement technique. The structures measured include a single superconductor strip line, multisuperconductor strip lines, a single superconductor strip line crossing a ground plane hole, and two coupled superconductor strip lines crossing a ground plane hole. All measured inductances are compared with inductances calculated from various inductance formulas and two numerical inductance calculation programs. Very good agreements are found between the measured inductances and the calculated results for most cases.
Two effects of the bias supply line on the performance of RSFQ circuits have been studied: inductive coupling between the bias supply line and circuit inductances; effect of the mirrored current in the ground plane. The following results of the study are presented: 3D calculations and experimental measurements of inductive coupling between parallel and perpendicular microstrips in presence of one and two ground planes; calculated margins dependence on the external magnetic field in RSFQ cell. Bias current density extraction method has been developed and implemented in RSFQ circuit design flow.
The recent development of integrated Josephson circuits with increased complexity-e.g. RSFQ devices-invokes the need of a comprehensive computer-aided design support. The derivation of circuit parameters from layout data as well as an efficient and versatile simulation technique are essential means in the design and dimensioning of complex integrated structures. We present a comprehensive solution for calculating circuit parameters and simulating the device dynamics. The calculation of inductances and capacitances is performed by three-dimensional field computation using special developed programs which have been proven in high-T/sub c/ SQUID design. They can process layout information in standard graphic interchange formats (e.g. DXF). The netlists for device simulation can be generated automatically from the equivalent circuit schematic. Additionally, a technique for distributed simulation, which allows performing margins-and-yields-analyses in an efficient manner, was elaborated. The performance of the whole design tool set is demonstrated using basic RSFQ circuits.>
The design of single flux-quantum (SFQ) circuits requires well-defined inductances. In many cases these are created by irregular geometries and a computer-aided design tool is necessary for inductance calculations. This becomes a challenging task in cases where no ground plane is used and thus three-dimensional calculations are required. For this purpose, InductEx was developed and verified successfully for simple structures. In this work we take the next step and demonstrate the applicability of InductEx to the design of rapid single flux-quantum (RSFQ) cells. We use InductEx for inductance modeling as an integral part of the design cycle for an RSFQ cell with flux quantum transfer via mutual inductance and for a DC-reprogrammable logic circuit with similar inductive coupling. The relation between coupling factor and self-inductance is optimized in the circuit layout. All coupling structures are duplicated in SQUID modulation test circuits to measure and verify calculation accuracy. We find excellent agreement between the calculated and measured inductance values. Furthermore, the operational area of the basic cell is determined and compared with similar investigations reported earlier. Based on this comparison we conclude that InductEx is a valuable inductance design tool, and that mutual coupling in structures using ground plane holes and RSFQ-compatible self-inductances can be modeled and designed reliably.
Single-flux-quantum (SFQ) digital circuits are mostly based on cells that rely on reliable foundry processes that make use of a superconducting ground plane as a reference for the active elements and the microstrip line interconnects. The quantum of magnetic flux h/2e, associated with the binary information, corresponds to a magnetic field energy density that needs to be localized in space to limit interactions between adjacent cells. In other words, mutual inductances can harm the proper behaviour of circuits unless they are taken carefully into account during the design phase. We studied extensively the Josephson transmission line cell with different geometrical configurations of the ground plane and bias pads. We found with the use of InductEx that the return current sometimes follows paths that are far from what intuition tells, which can lead to nonoptimized designs. In this paper, we emphasize the limitations due to the presence of external or internal magnetic fields. Then, we compare obtained performances with the ones with optimized geometries for which the presence of the magnetic field is taken into account from the design phase.
Abstract Data are presented on the inductance of various features used in superconductor digital integrated circuits: microstrip and stripline inductors with linewidths down to 120 nm and different combinations of ground plane layers, effect of perforations of various sizes in the ground planes and their distance to the inductors on inductance, inductance of vias of various sizes between adjacent layers, inductance of composite vias between distant superconducting layers. Test circuits used for the measurements were fabricated in a new 150 nm node of a fully planarized process with eight niobium layers developed at MIT Lincoln Laboratory for superconductor electronics as well as in our standard SFQ5ee and SC1 fabrication processes with 250 nm minimum feature size. The new SC2 process utilizes 193 nm photolithography in combination with plasma etching and chemical mechanical planarization of interlayer dielectrics to define inductors with linewidth down to about 100 nm on critical layers. The standard processes use 248 nm photolithography. The measured data are compared with the results of inductance extraction using software packages InductEx and wxLC. Variations of circuit inductors caused by the fabrication processes are discussed. Magnetic flux trapping in ground plane moats and its coupling to nearby inductors are discussed for circuit cooling in a residual field of several configurations.