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IEEE Transactions on Applied Superconductivity

Improved 1 V and 10 V Josephson voltage standard arrays

J. Kohlmann, F. Muller, P. Gutmann, R. Pöpel, L. Grimm, F.-W. Dunschede, Wolfgang Meier, J. Niemeyer

Published Jun 1, 1997• 26 citations
Publisher

Abstract

1 V and 10 V Josephson voltage standard arrays are fabricated on the basis of an improved design, using a modified technology. The Nb/Al/sub 2/O/sub 3//Nb trilayer is deposited directly on the Si wafer. The edges of the base electrodes are insulated by an anodization process. The maximum step voltage increases linearly with the external microwave voltage. Switching between different voltage levels is possible by simple switching of the dc voltage bias. A laboratory-made, oversized circular waveguide reduces the attenuation of the experimental set-up.

DOI
10.1109/77.622112

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1 V and 10 V Josephson voltage standard arrays are fabricated on the basis of an improved design, using a modified technology. The Nb/Al/sub 2/O/sub 3//Nb trilayer is deposited directly on the Si wafer. The edges of the base electrodes are insulated by an anodization process. The maximum step voltage increases linearly with the external microwave voltage. Switching between different voltage levels is possible by simple switching of the dc voltage bias. A laboratory-made, oversized circular waveguide reduces the attenuation of the experimental set-up.
A programmable dc voltage standard for output voltages of up to 10 V has been realized. The series arrays, consisting of about 69120 overdamped superconductor/insulator/normal metal/insulator/superconductor (SINIS) Josephson junctions, have been fabricated using the reliable Nb-Al/Al/sub 2/O/sub 3/ technology. The arrays can be operated in conventional Josephson voltage standards at microwave frequencies from 70 GHz to 75 GHz. Steps of constant voltage are observed at very low microwave power levels, since the major part of the microwave power is generated by the junctions themselves. The operation of the arrays and the formation of Shapiro steps are discussed.
Arrays of Nb/Al/sub 2/O/sub 3//Nb Josephson tunnel junctions show dc characteristics of high quality when the trilayer is deposited direct on polished Si wafers. Underlayers such as rf-sputtered SiO/sub 2/, can considerably degrade the junction parameters. These results suggest that voltage standard chips should be produced with a cover instead of a groundplane. First results of attenuation measurements on such circuits are presented and discussed. Furthermore, a new and more simple fabrication process without a window-insulating layer and only two photolithographic steps is presented. Arrays of several thousands of junctions showed no problems of any kind with trapped flux.>
Design and fabrication of Nb-PdAu-Nb trilayer Josephson junctions are described. The microwave response of an array of 1000 of these junctions was measured, and constant-voltage step heights mere characterized as a function of the microwave amplitude and frequency. Experimental results fit well to point-junction simulations at the 3 GHz design frequency of the microwave distribution network. The observed step height of 3.8 mA shows that the array and microwave distribution are sufficiently uniform for application in programmable Josephson voltage standards.
Series arrays of Nb–PdAu–Nb Josephson junctions were fabricated with characteristics ideally suited for application in programmable voltage standards and D/A converters with fundamental accuracy. Large arrays of junctions with applied microwave power showed constant voltage steps with current amplitudes as large as 7 mA. A novel coplanar waveguide design enabled uniform microwave power coupling to a five-segment array of 8192 junctions, so each segment had constant voltage steps over the same bias range. The 8192-junction device generated 1.1 mA steps at 186 mV with 11 GHz power and a maximum constant voltage step of 260 mV at 15.34 GHz.
A 10 V programmable Josephson voltage standard (PJVS) circuit with a maximum output voltage of 20 V and a microwave bias of 18.5 GHz was designed and fabricated. Although an attempt was made to improve the fabrication yield for the 10 V PJVS circuit, it was not sufficiently large to reproducibly fabricate a perfect chip without any defects. The redundant arrays were additionally integrated to increase the maximum output voltage, which contributed to an increase in the number of available chips under the limited fabrication yield. Fortunately, most of the defective arrays had a zeroth Shapiro step, while the first step was very small or zero. If the array was not dc biased, it did not generate any voltage, because it worked as a superconductive wiring. In this case, the maximum output voltage became smaller than that of a perfect chip, but it functioned as a 10 V PJVS, due to the back-up arrays.