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IEEE Transactions on Applied Superconductivity

Spread spectrum data transfer from dewar to dewar at 2 gigachips per second

John X. Przybysz, E.J. Dean, Paul D. Dresselhaus, Donald L. Miller, A. Hodge Worsham, Stanislav V. Polonsky

Published Mar 1, 2001• 4 citations
Publisher

Abstract

Spread spectrum data modulation, transmission, and demodulation has been demonstrated between SFQ chips in separate dewars. The baseband demonstration consisted of modulating (encoding) data with a spreading code, transmitting the coded data to a Receiver and demodulating (decoding) the data using an identical spreading code. The Transmitter code was produced by a 2 GHz, 4-bit SFQ pseudorandom sequence generator creating a 15-chip spreading code, which modulated a /spl sim/133 MHz data source. This data was output by a 10/spl times/ superconducting latch providing /spl sim/8 mV of AC drive. This signal was fed through 50-/spl Omega/ coaxial cable to a SFQ Receiver chip in a separate dewar. No amplification of the AC signal between the dewars was needed, however, a slight DC bias was added to the signal as a flux bias for the input SQUID on the Receiver. The Receiver chip consisted of an identical SFQ pseudorandom sequence generator and a data demodulation gate. Demodulating the received data with the code generator produced a replica of the data signal in RZ form. Both time forward and time reversed codes for the spreading/despreading sequence were created.

DOI
10.1109/77.919513

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Spread spectrum data modulation, transmission, and demodulation has been demonstrated between SFQ chips in separate dewars. The baseband demonstration consisted of modulating (encoding) data with a spreading code, transmitting the coded data to a Receiver and demodulating (decoding) the data using an identical spreading code. The Transmitter code was produced by a 2 GHz, 4-bit SFQ pseudorandom sequence generator creating a 15-chip spreading code, which modulated a /spl sim/133 MHz data source. This data was output by a 10/spl times/ superconducting latch providing /spl sim/8 mV of AC drive. This signal was fed through 50-/spl Omega/ coaxial cable to a SFQ Receiver chip in a separate dewar. No amplification of the AC signal between the dewars was needed, however, a slight DC bias was added to the signal as a flux bias for the input SQUID on the Receiver. The Receiver chip consisted of an identical SFQ pseudorandom sequence generator and a data demodulation gate. Demodulating the received data with the code generator produced a replica of the data signal in RZ form. Both time forward and time reversed codes for the spreading/despreading sequence were created.
Digital circuits have been developed to interface superconductive electronic chips with high speed 50-/spl Omega/ transmission lines. Digital data at 1 Gigabit per second was transferred through a Josephson chip in a first cryostat to another Josephson chip in a second cryostat. The chips were connected by more than 3 meters of 50-/spl Omega/ transmission line. No semiconductor amplifiers were used in this data path. A Hewlett Packard data source provided the original data to the first chip, which converted it to SFQ data. Output interface circuits were driven by a 2-GHz external clock to latch series strings of 10 junctions and drive 2-Gbps data into a 50-/spl Omega/ cable. In the second cryostat, a latching three-junction interferometer with a two-turn control line converted the input signal to latched data and switched an MVTL OR-gate output. This demonstration showed that low-power Josephson digital circuits can be integrated into multichip digital subsystems that can pass data at high rates without the use of power-hungry semiconductor amplifiers.
The high speed and low power needed for Spread Spectrum communications leads to a desirable application of digital superconductivity. Low temperature Nb/AlOx/Nb digital Single Flux Quantum (SFQ) circuits have been designed and fabricated in our facility, which compose critical subcircuits of the superconductive Spread Spectrum Modem. Four- and 6-bit Pseudo Random Binary Sequence (PRES) generators with output latching amplifiers have been produced and operated at up to 5.4 GHz. On chip modulation and de-modulation of these PRES codes have been performed with time resolution of less than one chip of the code. High-speed off-chip data was XORed with the on-chip PRES at up to 3.7 GHz to produce the modulated pattern. Rapid synchronization allows the code to start within one clock cycle of being fully reset, and the latching output amplifier gives enough power to do real time room temperature measurements of high-speed SFQ circuits.
The contract for Battlefield Online with Superconductive Systems build upon the success of previous AFRL contracts to develop components based on superconductive electronics for spread spectrum modems. The prior work had demonstrated a low power chip that operated at 2 GHz and performed spread spectrum functions. This contract developed a Digital Correlator and a rapid Synchronizer and demonstrated that the correlation and synchronization could be performed with superconductive digital electronics. The Digital Correlator demonstrated correct mixing of 2-bit Data with Code and accumulation of the correlation sum at speeds up to 320 MHz. It correctly accumulated single inputs at rates up to 3 GHz. The synchronizer demonstrated most of its functions at low speed. Another task supported the design of a Glue Chip for use in a Crossbar data switch. The Glue Chip is part of a multichip module that forms the switch fabric. The Glue Chip was designed to have high sensitivity to weal signals, but changes in the design of the Switch Chip created a stronger signal, so the sensitive Glue Chips were not built. The high-speed circuits developed under these AFRL contracts have the ability to transform communications. The report contains two scientific papers: "Spread Spectrum Data Transfer from Dewar to Dewar at 2 Gigachips per Second," and "Digital Correlator for a Spread Spectrum Modem Operating at 2 Gigachips per Second."
Superconductive electronics can provide low power, GHz speed spread spectrum satellite communications. The key components to construct the spread spectrum modem are an analog filter and a digital pseudorandom bit sequence generator, Various SFQ logic circuits are required to construct a code generator. These circuits include a shift register, a reset switch, and an XOR or XNOR. To make a 4 bit 15 sequence code generator, a four stage shift register with a fan-out of two on each stage was designed. These circuits, fabricated with eight level Nb/AlO/sub x//Nb Josephson junction integrated circuit process, showed correct operation at low speed digital tests. The low speed digital test was done by using a "catcher", the combination of a read SQUID and a Josephson transmission line (JTL) which were magnetically coupled to each other. High speed testing of the shift register used a latch amplifier, which amplified an SFQ pulse to a latching output voltage of about 2 mV. This test showed correct operation of the shift register at speeds of up to 4.6 GHz.>
We have developed an interchip data transmission scheme through passive transmission lines on a multi-chip-module (MCM) carrier and 100-/spl mu/m solder bump bonds. In rapid single flux quantum (RSFQ) logic, digital data are in the form of single flux quantum (SFQ) pulses. A reliable scheme for transmission of SFQ pulses through non-superconducting solder bumps between chips through a passive MCM substrate is yet to be established. Therefore, we have devised a scheme that converts SFQ pulses into toggles in a voltage waveform for interchip transmission. Data in the form of SFQ pulses are reconstructed from this voltage waveform using a sensitive quantizing pulse receiver. Our objective is to eliminate the need for amplification of the transmitted signal. This is achieved by increasing the receiver sensitivity. However, a sensitive receiver, a dc SQUID, may produce more than one SFQ pulse for each rising/falling edge of the voltage waveform. A simple circuit, pulse resurrection logic (PRL), is employed to discard any extra SFQ pulses. Together with the sensitive quantizer, the PRL circuit makes our scheme error tolerant. We have demonstrated the receiver operation using 3-/spl mu/m Nb RSFQ circuits at frequencies up to 20 GHz.
Interface circuits for the transfer of data between Single Flux Quantum (SPQ) circuits have been designed, fabricated, and operated at speeds up to 3 Gigabits per second. The circuit employed an improved version of the SFQ/Latch converter, a Modified Variable Threshold Logic (MVTL) OR/AND gate, a 3/spl times/ latching amplifier, and a 3/spl times/-to-10/spl times/ latching amplifier. The amplifier circuits employed stacks of latching junctions. Resistors between the parallel stacks of junctions damped residual currents to prevent flux trapping during reset. Tolerance to critical current variations in the series stacks of junctions was provided by inductive chokes on the input junction shunting resistors. Microwave modeling programs were used to ensure proper distribution of the applied current to all of the latching elements. The circuit transferred data at 3 Gigabits per second from one SFQ circuit up to room temperature and back to another SFQ circuit through 3.4 meters of 50-ohm cable.