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IEEE Transactions on Applied Superconductivity

4.6 GHz SFQ shift register and SFQ pseudorandom bit sequence generator

Joonhee Kang, A. Hodge Worsham, John X. Przybysz

Published Jun 1, 1995• 23 citations
Publisher

Abstract

Superconductive electronics can provide low power, GHz speed spread spectrum satellite communications. The key components to construct the spread spectrum modem are an analog filter and a digital pseudorandom bit sequence generator, Various SFQ logic circuits are required to construct a code generator. These circuits include a shift register, a reset switch, and an XOR or XNOR. To make a 4 bit 15 sequence code generator, a four stage shift register with a fan-out of two on each stage was designed. These circuits, fabricated with eight level Nb/AlO/sub x//Nb Josephson junction integrated circuit process, showed correct operation at low speed digital tests. The low speed digital test was done by using a "catcher", the combination of a read SQUID and a Josephson transmission line (JTL) which were magnetically coupled to each other. High speed testing of the shift register used a latch amplifier, which amplified an SFQ pulse to a latching output voltage of about 2 mV. This test showed correct operation of the shift register at speeds of up to 4.6 GHz.>

DOI
10.1109/77.403180

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IEEE Transactions on Applied Superconductivity•Jan 1, 1993•2 citations
Superconductive electronics can provide low power, GHz speed spread spectrum satellite communications. The key components to construct the spread spectrum modem are an analog filter and a digital pseudorandom bit sequence generator, Various SFQ logic circuits are required to construct a code generator. These circuits include a shift register, a reset switch, and an XOR or XNOR. To make a 4 bit 15 sequence code generator, a four stage shift register with a fan-out of two on each stage was designed. These circuits, fabricated with eight level Nb/AlO/sub x//Nb Josephson junction integrated circuit process, showed correct operation at low speed digital tests. The low speed digital test was done by using a "catcher", the combination of a read SQUID and a Josephson transmission line (JTL) which were magnetically coupled to each other. High speed testing of the shift register used a latch amplifier, which amplified an SFQ pulse to a latching output voltage of about 2 mV. This test showed correct operation of the shift register at speeds of up to 4.6 GHz.>
The high speed and low power needed for Spread Spectrum communications leads to a desirable application of digital superconductivity. Low temperature Nb/AlOx/Nb digital Single Flux Quantum (SFQ) circuits have been designed and fabricated in our facility, which compose critical subcircuits of the superconductive Spread Spectrum Modem. Four- and 6-bit Pseudo Random Binary Sequence (PRES) generators with output latching amplifiers have been produced and operated at up to 5.4 GHz. On chip modulation and de-modulation of these PRES codes have been performed with time resolution of less than one chip of the code. High-speed off-chip data was XORed with the on-chip PRES at up to 3.7 GHz to produce the modulated pattern. Rapid synchronization allows the code to start within one clock cycle of being fully reset, and the latching output amplifier gives enough power to do real time room temperature measurements of high-speed SFQ circuits.
A 4 bit 15 sequence SFQ (Single Flux Quantum) pseudorandom bit sequence generator was built with an eight-level Nb/AlO/sub x//Nb Josephson junction integrated circuit process. An SFQ circuit was built into the code generator to enable a rapid restart. The test results showed that the circuit operated correctly at the seed of 3.69 GHz. The XNOR gate and shift register worked correctly at 5 GHz. However, the back delay was longer than 200 psec and the generator acted as a 5 bit 21 sequence code generator at this frequency. At 200 MHz, the code generator was operated continuously to observe its stability. Over the course of two and one half hours, the circuit made only five code errors, indicating a bit error rate of 3/spl times/10/sup -12/. At 2 GHz we collected 10 million samples on the 4023rd bit of the sequence. No wrong signal values were observed, indicating the bit error rate is less than 5/spl times/10/sup -11/ at this frequency.
A Josephson SFQ (single flux quantum) shift register circuit operating under a two-phase power was designed and tested. The test cell was fabricated using the Nb/AlO/sub x//Nb junction SNEAP process. The main data latch is DC biased; the data storage is accomplished by the transfer of a single flux quantum in or out of a SQUID (superconducting quantum interference device) superconducting loop. A two-phase sinusoidal clock with offset is used to operate the circuit. Simulations verify that the operating frequency can go beyond 70 GHz, with operating margins exceeding 20%. Preliminary measurements indicate that the circuit operates as intended.>
Maximum-length sequences (M-sequences) are known as pseudo-random numbers generated with relatively simple digital circuits. In this paper, we present a single-flux-quantum digital circuit that generated three output bits of a 4-bit M-sequence in one clock operation. The circuit comprised three clocked exclusive-or gates, one delay flip-flop, three dc/SFQ converters (for set, reset, and low-frequency clock signals), and three SFQ/dc converters (for three parallel outputs), all of which were integrated on a superconducting Nb chip. A 10-GHz clock generator was also implemented for high-speed testing. The total number of Nb/AlOx/Nb Josephson junctions was 568. Verilog simulation demonstrated correct circuit operation with a 20-GHz clock, which corresponded to the generation rate of 60 Gb/s. The measurement was carried out in a liquid helium bath. Low-speed testing with a 1-kHz clock demonstrated periodic signals of three parallelized 4-bit M-sequence. We also confirmed that the outputs were correctly shifted when 13 clock signals of 10 GHz were fed between two 1-kHz clock signals.
Testing on a single-flux-quantum (SFQ) shift register fabricated with a SFQ Nb-AlO/sub x/Nb Josephson junction process indicates that a stable flux quantum can be stored in a rapid SFQ (RSFQ) shift register stage and be shifted by SFQ pulses. Design simulations showed that logic errors can occur in SFQ shift registers even though the circuit passes the average voltage test. Three-junction-per-stage shift registers had an advantage over the two-junction-per-stage shift register in handling data with successive 1's and in incorporating resistors to increase tolerance of trapped magnetic flux. Input and output buffers for data and clock pulses were added to get an RSFQ shift register to obtain correct performance. The highest error-free operation speed for the data with successive 1's is about half of the speed for propagation of a lone data 1. Error-free operation of SFQ shift registers with three junctions per stage could be obtained up to speeds of 30-60 GHz with Josephson junctions having I/sub c/R/sub n/ (critical-current-normal-resistance product) values of 600 mu V.>