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IEEE Transactions on Applied Superconductivity

Superconductor-to-Semiconductor Interface Circuit for High Data Rates

Thomas Ortlepp, S. Wünsch, M. Schubert, Pascal Febvre, Bjoern Ebert, J. Kunert, E. Crocoll, H.‐G. Meyer, M. Siegel, Friedrich Uhlmann

Published Jan 20, 2009• 33 citations
Publisher

Abstract

We present a new kind of rapid-single-flux-quantum (RSFQ) output driver together with a pseudomorphic high electron mobility transistor (p-HEMT) amplifier both operating at liquid helium temperature. The passive interconnect including the interchip connection between the RSFQ output driver and the first transistor stage of the semiconductor amplifier is the key element for signal matching and was optimized for minimizing the reflections to the RSFQ circuit. The RSFQ output driver is based on a single-flux-quantum to dc converter and a voltage doubler. The circuit is realized in the Niobium based 1 kA/cm2process of FLUXONICS Foundry and provides up to 438-muV output voltage. We demonstrate high-speed experiments of the output driver in combination with two different semiconductor amplifier circuits at liquid helium temperature. The output voltage of a 2-Gb/s data stream was measured to be about 3.5 mV.

DOI
10.1109/tasc.2008.2009997

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We present a new kind of rapid-single-flux-quantum (RSFQ) output driver together with a pseudomorphic high electron mobility transistor (p-HEMT) amplifier both operating at liquid helium temperature. The passive interconnect including the interchip connection between the RSFQ output driver and the first transistor stage of the semiconductor amplifier is the key element for signal matching and was optimized for minimizing the reflections to the RSFQ circuit. The RSFQ output driver is based on a single-flux-quantum to dc converter and a voltage doubler. The circuit is realized in the Niobium based 1 kA/cm2process of FLUXONICS Foundry and provides up to 438-muV output voltage. We demonstrate high-speed experiments of the output driver in combination with two different semiconductor amplifier circuits at liquid helium temperature. The output voltage of a 2-Gb/s data stream was measured to be about 3.5 mV.
We present an Rapid Single Flux Quantum (RSFQ) based high voltage driver (HVD) developed for the first amplification stage of a hybrid semiconductor-superconductor memory interface for the RSFQ digital signal processor. Implementation of the driver allows to eliminate the impedance mismatch between RSFQ and standard 50 Omega input of semiconductor electronics and increases the signal-to-noise ratio to reach reliable signal transmission with sufficiently low bit error rate. The driver design is based on the serial stack of 8 SQUIDs with specially configured ground-cuts that form a quasi-coplanar line with 50 Omega impedance. The impedance of the driver has been extracted using 3D EM simulators that accurately take into account multilayer structure and capacitance to the ground. The circuit has been designed for the Hypres 4.5 kA/cm2process. The driver was simulated numerically in PSCAN. The driver can produce output signal at 1 Gbit/s speed and 2.4 mV signal level that is enough to be sensed by low-noise amplifier on the further amplification stage.
We proposed and successfully demonstrated a high-speed Josephson IC to semiconductor IC output interface circuit combining a high electron mobility transistor (HEMT) amplifier and Josephson high-voltage drivers successfully. We developed a 0.5-/spl mu/m gate 77-K wide-band analog monolithic HEMT amplifier for the interface. The HEMT device consisted of InGaP/InGaAs materials stable even at 77 K. The amplifier has a differential amplifier as a first stage to cancel out ground-level fluctuations in the Josephson IC and showed a voltage gain of 23 dB and /spl sim/3-dB frequency of 8 GHz. A 0.63-V/sub p-p/ output was obtained from a 5-GHz, 30-mV/sub p-p/ complementary input signal. We succeeded in transfer ring a voltage signal from 10-stack Josephson high-voltage drivers to a 50-/spl Omega/ system at room temperature with 0.7-V/sub p-p/ amplitude at 300-MHz clock using the HEMT amplifier.
The high-speed operation of a one-channel output interface for a single-flux quantum (SFQ) system has been demonstrated. The interface consisted of a Josephson latching driver, a room-temperature semiconductor amplifier, and a decision circuit module. The Josephson latching driver was fabricated by using a 2.5-kA/cm/sup 2/ standard Nb junction process and used to amplify an SFQ pulse into a 5.5-mV level signal at 10 Gb/s. The interface converted the SFQ pulse signal into a nonreturn-to-zero signal having an amplitude of 1 V at 10 Gb/s.
Interface circuits are the key components that enable the hybrid integration of superconductor and semiconductor digital electronics. The design requirements of superconductor-semiconductor interface circuits vary depending on the application, such as high-performance classical computing, superconducting quantum computing, and digital signal processing. In this survey, various interface circuits are categorized based on the working principle and structure. The superconducting output drivers are explored, which are capable of converting and amplifying, e.g., single flux quantum (SFQ) voltage pulses, to voltage levels that semiconductor circuits can process. Several trade-offs between circuit- and system-level design parameters are examined. Accordingly, parameters such as the data rate, output voltage, power dissipation, layout area, thermal/heat load of cryogenic cables, and bit-error rate are considered.
The connection of RSFQ circuits with commercial room temperature electronics and amplifying SFQ pulses with high data rates require cryogenic interface amplifiers. Such amplifiers should provide extremely high bandwidth, low noise and low power consumption at the same time. Various hybrid amplifiers based on commercial p-HEMT transistors in an embedded microwave design were designed and characterized. Towards the p-HEMT transistor characterization at cryogenic temperature the biasing settings according to an optimum between voltage gain and low power consumption were determined. Thus a total power consumption of 2 mW and a voltage gain of 12 dB per single stage were achieved. For a preamplifier and an amplifier concept a multiple number of these stages were implemented in a microstrip and a coplanar transmission line design with a special matched interconnect taper towards the RSFQ components. Measurements of the amplifiers, the combination of an amplifier with a RSFQ circuit at 4.2 K showed their good performances without any disturbance of the RSFQ circuit. Due to the losses between the stages a total gain of 25 dB with a four stage amplifier was achieved; pulse rates went up to 3 Gb/s. The total power consumption was in the range of 8 mW. Further increase of data rates will be achieved by improving the matching between RSFQ output stage and amplifier.