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IEEE Transactions on Applied Superconductivity

Cryogenic Test-Bed Applied to 9 K NbN RSFQ Devices Operation

Mario Aurino, Emanuele Baggetta, Sophie Bouat, Vratislav Michal, D. Renaud, C. Bornier, M. Laine, J.C. Villégier

Published Nov 23, 2010• 2 citations
Publisher

Abstract

NbN RSFQ circuits operating at 9 K reduce the cooling constraints especially for portable, remote, telecoms or medical imaging applications. We have developed a test-bed to study the operating temperature of the various mixed RF and digital circuit blocks of NbN ‘HyperSCAN’ project test vehicle 1${\rm cm}^{2}$chips. The use of a widespread helium cryostat (‘Orange-ILL’) allows us to stabilize the chip temperature in the range 2.9 K–20 K with thermal oscillations lower than 0.1 K. The chip is mounted on a PCB and shielded from the external field: the PCB provides a multi-connection packaging used in order to study temperature and frequency operation of 30 GHz NbTiN CPW filters, RSFQ gates, analog SQUID and NbN/TaN/NbN SNS junctions arrays. The comparison between electrical simulations and tests is made on flexible,$\sim$56 cm long, micro-strip line ribbon cable carrying 32 signals each including bias lines, in the range of DC-3 GHz, combined with 4 semi-rigid$\sim$40 GHz coaxial cables. By removing spurious resonances, it is expected to take full benefit of the large bandwidth, low insertion loss and low thermal conductivity of the set-up. We emphasis on the flexibility, large yield, reliability and reduced cost of such packaging coupled to He cooling exchanger for applying to testers and to future 9 K NbN multi-ADC green and remote systems when only low electrical power sources are available.

DOI
10.1109/tasc.2010.2086417

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NbN RSFQ circuits operating at 9 K reduce the cooling constraints especially for portable, remote, telecoms or medical imaging applications. We have developed a test-bed to study the operating temperature of the various mixed RF and digital circuit blocks of NbN ‘HyperSCAN’ project test vehicle 1cm2{\rm cm}^{2}cm2chips. The use of a widespread helium cryostat (‘Orange-ILL’) allows us to stabilize the chip temperature in the range 2.9 K–20 K with thermal oscillations lower than 0.1 K. The chip is mounted on a PCB and shielded from the external field: the PCB provides a multi-connection packaging used in order to study temperature and frequency operation of 30 GHz NbTiN CPW filters, RSFQ gates, analog SQUID and NbN/TaN/NbN SNS junctions arrays. The comparison between electrical simulations and tests is made on flexible,∼\sim∼56 cm long, micro-strip line ribbon cable carrying 32 signals each including bias lines, in the range of DC-3 GHz, combined with 4 semi-rigid∼\sim∼40 GHz coaxial cables. By removing spurious resonances, it is expected to take full benefit of the large bandwidth, low insertion loss and low thermal conductivity of the set-up. We emphasis on the flexibility, large yield, reliability and reduced cost of such packaging coupled to He cooling exchanger for applying to testers and to future 9 K NbN multi-ADC green and remote systems when only low electrical power sources are available.
Future development of superconductor digital and mixed-signal ICs requires extensive testing with a large number of input/output (I/O) lines for applying independent bias controls, injecting test signals, and monitoring outputs of different sub-circuits. There is a growing need for a standardized test apparatus for a variety of complex superconducting chips and multichip modules (MCMs). Such a test apparatus must support many I/O lines, be easy and cost-effective to operate, and support prolonged automated testing. Existing test apparatus include liquid He cryoprobes and cryocooled custom digital-RF systems, both of which have drawbacks. Liquid He cryoprobes with universal wiring, such as 40 or 80 coaxial cables, are convenient to use. Cooled by immersion in a tank filled with liquid He, these cryoprobes allow rapid cool-down and warm-up. However, large consumption of liquid He, the cost of which has been steadily increasing worldwide, makes this solution rather expensive and wasteful. On the other hand, one can exploit the modular reconfigurability of HYPRES' digital-RF receiver product to create a testbed for different ICs. Such a system uses the smallest commercially available closed-cycle refrigerator (~1.2 kW) and has negligible operating cost. However, reconfiguration takes time and expertise since these products are specially designed with customized chip package and wiring to minimize the thermal load on the cryocooler. These low-maintenance systems are ideal for prolonged operation of a single chip, which is invaluable for superconductor electronics system developers and end-users. The integrated cryoelectronics testbed (ICE-T) combines the advantages of the liquid He cryoprobe and the cryocooled digital-RF product. By using a more powerful, commercially available, electrically powered closed-cycle refrigerator (7 kW), ICE-T alleviates the thermal constraints on wiring while maintaining very low operating cost. By separating the electrical and thermal subsystems, it maintains modularity without sacrificing the universality of the cryoprobe. A set of universal and custom electrical modules can be independently built and inserted in ICE-T. Universal inserts with 40 and 80 coaxial cables accommodate all chips with standard I/O pads like the familiar liquid He cryoprobes. Custom inserts for different classes of chips and MCMs are designed and built according to user requirements and specifications. The utility of the ICE-T was successfully demonstrated by testing a benchmark superconducting digital circuit at low frequency and an analog-to-digital converter chip clocked above 20 GHz.
NbN-TaN-Nb(Ti)N non-hysteretic SNS Josephson junctions with TaXN barriers tuned through nitrogen content at metal-insulator transition have been produced in a reliable way with characteristic voltage RNICabove 1.5 mV at 9 K. Barriers are typically 7-10 nm thick and Jc in the range 5 to 25 kA/cm-2making feasible LSI RSFQ ADC circuit integration by using the lithographic tools of the Leti C-MOS platform. Junction tri-layers, NbTiN ground-plane and wiring levels have been reactively sputtered and optimized at 300°C in a reproducible way on 8-inch oxidized silicon wafers. A deep UV stepper combined with SF6 gas mixtures RIE has been used to achieve low spread lithography in junction diameters of 716 nm (3σ ~ 40 nm), of 465 nm (3σ ~ 84 nm) across the 8-inch. A well controlled CMP planarization process has been developed on thick PE-CVD silica layers deposited on each superconducting nitride layer. On-line FIB-SEM observations and electrical characterizations associated to the development of a technology test vehicle demonstrate the feasibility of the complete process. The reliable production of nitrides LSI RSFQ circuits such as ADCs and integrated imagers operating in a relaxed cryogenic environment in the 6-10 K temperature range is foreseen to open new telecoms and medical applications. Moreover, a new MgO-AlN-MgO layered insulating barrier junction is shown to operate above 10 K and will be developed for analog front-end circuit parts.
We have developed a cryogenic probe and cryostat system to test both active and passive superconducting devices and circuits up to microwave frequencies at variable temperatures. Our system consists of two basic parts: the cryostat and the matching probe. The cryostat is a unique, very efficient, variable temperature, flow-type cryostat, where we control temperature without electrical heaters. It is magnetically shielded and allows rapid testing between 4.2 K and room temperature. Probes developed for this cryostat have a larger number of shorter cables than standard dip-type probes. They are designed to test chips or chip assemblies without additional packaging. Chips or chip assemblies can be quickly mounted and dismounted from a fixed spring-contact assembly. Each probe has 56 wide-bandwidth signal cables. We have repeatedly used these probes for testing both active and passive superconducting integrated circuits up to 20 GHz. The probe and cryostat combination provides a testing capability that is simultaneously high frequency, dc magnetic shielded, has variable cryogenic temperature, and quick turnaround.
HYPRES is developing a prototype digital system comprising a Nb RSFQ analog-to-digital converter (ADC) and SiGe amplifiers on a commercial two-stage cryocooler. This involves the detailed thermal, electrical, and mechanical design of the ADC chip mount, input/output (I/O) cables, and electromagnetic shielding. Our objective is to minimize the heat load on the second (4 K) stage of the cryocooler, in order to ensure stable ADC operation. The design incorporates thermal radiation shields and magnetic shielding for the RSFQ circuit. For the I/O cables, the thermal design must be balanced against the acceptable attenuation of RF lines and resistance of DC bias lines. SiGe heterojunction bipolar transistor (HBT) signal conditioning circuits, placed on the first (60 K) stage of the cryocooler, will amplify the mV-level ADC outputs to V-level (e.g., ECL) outputs for seamless transition to room-temperature electronics. Cooling these HBT circuits lowers noise and improves their high-frequency performance. Demonstration of this prototype should lead the way to commercialization of high-speed digital superconducting systems, for such applications as wireless communication, radars, and switching networks.
A refrigeration system was designed and constructed for realizing a liquid-He-free programmable Josephson voltage standard. The system is equipped with a two-stage Gifford-McMahon cooler, a thermal-radiation shield, a magnetic-field shield and semi-rigid coaxial cables to supply microwave power to a chip. The performance of the system was examined by use of a NbN-based 8-bit digital-to-analog converter (DAC) chip designed as a 1 V programmable voltage standard. When operated at 8.5 K on the cryocooler, constant-voltage steps with amplitudes greater than 1 mA were observed for every segment of junction arrays on the chip.
We have fabricated both NbN/Ta x N/NbN SN*S-type, NbN/MgO/NbN SIS-type Josephson junctions and microwave band-pass filters on different substrates (Si, Sapphire, MgO). NbN films have been deposited on both sides of (100) oriented, 250 µm thick, MgO substrates with a high crystalline texture quality. The aim was to investigate the performances and the maximum achievable operating frequency in an NbN based RSFQ modulator front-end of an ADC in the 4 K-10 K temperature range. We observed that Ta x N thin films can be tuned from an insulating phase to a superconducting phase (Tc ∼4K) by varying the nitrogen content during sputter deposition while the barrier height of MgO can also be controlled by deposition conditions and by tri-layer postdeposition annealing. Junction properties (Jc∼10-25 kA/cm 2 ), Mac Cumber parameter and RnIc product measured up to 1 mV are shown to be controlled by the reactive sputtering conditions. We have designed three pole band-pass filters and resonators in a micro-strip configuration and studied the junction coupling with the filters. We will show that a sigma-delta NbN technology is a suitable solution for analogue-to-digital conversion in the future generations of telecommunication satellites to achieve high sampling frequency and large bandwidth at high carrier frequency signal.