NbN-TaN-Nb(Ti)N non-hysteretic SNS Josephson junctions with TaXN barriers tuned through nitrogen content at metal-insulator transition have been produced in a reliable way with characteristic voltage RNICabove 1.5 mV at 9 K. Barriers are typically 7-10 nm thick and Jc in the range 5 to 25 kA/cm-2making feasible LSI RSFQ ADC circuit integration by using the lithographic tools of the Leti C-MOS platform. Junction tri-layers, NbTiN ground-plane and wiring levels have been reactively sputtered and optimized at 300°C in a reproducible way on 8-inch oxidized silicon wafers. A deep UV stepper combined with SF6 gas mixtures RIE has been used to achieve low spread lithography in junction diameters of 716 nm (3σ ~ 40 nm), of 465 nm (3σ ~ 84 nm) across the 8-inch. A well controlled CMP planarization process has been developed on thick PE-CVD silica layers deposited on each superconducting nitride layer. On-line FIB-SEM observations and electrical characterizations associated to the development of a technology test vehicle demonstrate the feasibility of the complete process. The reliable production of nitrides LSI RSFQ circuits such as ADCs and integrated imagers operating in a relaxed cryogenic environment in the 6-10 K temperature range is foreseen to open new telecoms and medical applications. Moreover, a new MgO-AlN-MgO layered insulating barrier junction is shown to operate above 10 K and will be developed for analog front-end circuit parts.
NbN-TaN-Nb(Ti)N non-hysteretic SNS Josephson junctions with TaXN barriers tuned through nitrogen content at metal-insulator transition have been produced in a reliable way with characteristic voltage RNICabove 1.5 mV at 9 K. Barriers are typically 7-10 nm thick and Jc in the range 5 to 25 kA/cm-2making feasible LSI RSFQ ADC circuit integration by using the lithographic tools of the Leti C-MOS platform. Junction tri-layers, NbTiN ground-plane and wiring levels have been reactively sputtered and optimized at 300°C in a reproducible way on 8-inch oxidized silicon wafers. A deep UV stepper combined with SF6 gas mixtures RIE has been used to achieve low spread lithography in junction diameters of 716 nm (3σ ~ 40 nm), of 465 nm (3σ ~ 84 nm) across the 8-inch. A well controlled CMP planarization process has been developed on thick PE-CVD silica layers deposited on each superconducting nitride layer. On-line FIB-SEM observations and electrical characterizations associated to the development of a technology test vehicle demonstrate the feasibility of the complete process. The reliable production of nitrides LSI RSFQ circuits such as ADCs and integrated imagers operating in a relaxed cryogenic environment in the 6-10 K temperature range is foreseen to open new telecoms and medical applications. Moreover, a new MgO-AlN-MgO layered insulating barrier junction is shown to operate above 10 K and will be developed for analog front-end circuit parts.
We have fabricated both NbN/Ta x N/NbN SN*S-type, NbN/MgO/NbN SIS-type Josephson junctions and microwave band-pass filters on different substrates (Si, Sapphire, MgO). NbN films have been deposited on both sides of (100) oriented, 250 µm thick, MgO substrates with a high crystalline texture quality. The aim was to investigate the performances and the maximum achievable operating frequency in an NbN based RSFQ modulator front-end of an ADC in the 4 K-10 K temperature range. We observed that Ta x N thin films can be tuned from an insulating phase to a superconducting phase (Tc ∼4K) by varying the nitrogen content during sputter deposition while the barrier height of MgO can also be controlled by deposition conditions and by tri-layer postdeposition annealing. Junction properties (Jc∼10-25 kA/cm 2 ), Mac Cumber parameter and RnIc product measured up to 1 mV are shown to be controlled by the reactive sputtering conditions. We have designed three pole band-pass filters and resonators in a micro-strip configuration and studied the junction coupling with the filters. We will show that a sigma-delta NbN technology is a suitable solution for analogue-to-digital conversion in the future generations of telecommunication satellites to achieve high sampling frequency and large bandwidth at high carrier frequency signal.
A generic NbN Superconducting Tunnel Junctions (STJ) technology has been developed using conventional substrates (Si and SOI-SIMOX) for making THz spectrometers including SIS receivers and RSFQ logic gates. NbN/MgO/NbN junctions with area of 1 /spl mu/m/sup 2/, Jc of 10 kA/cm/sup 2/ and low sub-gap leakage current (Vm>25 mV) are currently obtained from room temperature sputtered multilayers followed by a post-annealing at 250/spl deg/C. Using a thin MgO buffer layer deposited underneath the NbN electrodes, ensures lower NbN surface resistance values (Rs=7 /spl mu//spl Omega/) at 10 GHz and 4 K. Epitaxial NbN [100] films on MgO [100] with high gap frequency (1.4 THz) have also been achieved under the same deposition conditions at room temperature. The NbN SIS has shown good I-V photon induced steps when LO pumped at 300 GHz. We have developed an 8 levels Al/NbN multilayer process for making 1.5 THz SIS mixers (including Al antennas) on Si membranes patterned in SOI-SIMOX. Using the planarization techniques developed at the Si-MOS CEA-LETI Facility, we have also demonstrated on the possibility of extending our NbN technology to high level RSFQ circuit integration with 0.5 /spl mu/m/sup 2/ junction area, made on large area substrates (up to 8 inches).
Abstract We report on the electrical properties of NbN/TaN/NbN Josephson junctions grown on thermally oxidized silicon substrates, along with the design and fabrication of superconducting single-flux-quantum (SFQ) circuits based on these NbN superconductor/normal metal/superconductor (SNS) junctions. The critical current density ( J c ) of the junctions was found to be relatively sensitive to the barrier thickness, decreasing from 108.0 ± 8.1 kA cm −2 for a 15 nm barrier to 12.8 ± 1.9 kA cm −2 for a 30 nm barrier. For a J c of approximately 24.5 ± 2.1 kA cm −2 and a barrier thickness of 25 nm, the NbN SNS junctions are self-shunted and exhibit nonhysteretic current–voltage ( I – V ) characteristics. Especially for junctions with diameter ( φ ) ranging from 0.8 to 1.6 μ m, their critical current ( I c ) falls within the range of 110–450 μ A, making them suitable for SFQ circuits. By considering the impact of excess current and incorporating it as an additional term in the conventional resistively and capacitively shunted junction model, the I – V curves of NbN SNS junctions can be precisely described, successfully minimizing the deviation between simulations and test results. The DC-SFQ and SFQ-DC interface circuits can both operate normally, and the bias margins of cell circuits such as Josephson transmission line, confluence buffer, D flip-flop, and splitter are greater than 40%. Compared to Nb superconductor/insulator/superconductor junctions, their self-shunting characteristics and relatively thick 25 nm barriers can also enhance the integration of circuits and increase the yield to complex circuits.
To increase the integration scale of superconductor electronics, we are developing a new node, titled SFQ7ee, of the fabrication process at MIT Lincoln Laboratory. In comparison to the existing SFQ5ee node, we increased the number of fully planarized superconducting layers to ten and utilized NbN and NbN/Nb kinetic inductors to increase the possible inductor number density above a hundred million inductors per cm2. Increasing the Josephson junction number density to the same level requires implementing self-shunted high-JcJosephson junctions. We investigated the properties of Nb/NbNx/Nb trilayer junctions as a potential replacement of high-JcNb/Al-AlOx/Nb junctions, where NbNxis a disordered, overstoichiometric, nonsuperconducting nitride deposited by reactive sputtering. Dependences of theIcRnproduct and Josephson critical current density, Jc on the NbNx barrier thickness and temperature were studied in the thickness range from 5 nm to 20 nm. The fabricated junctions can be well described by the microscopic theory of SNS junctions, assuming no suppression of the energy gap in Nb electrodes near the NbNxinterfaces and a Cooper pair decay length in the NbNx barrier, ξnTcof about 2.3 nm. Current-voltage characteristics of the junctions are well described by the resistively and capacitively shunted junction (RCSJ) model without excess current. In the studied rangeJc2, the Nb/NbNx/Nb junctions have lower values of the specific resistanceRnA, lower IcRn products, and a stronger dependence of theIcRnon temperature than the self-shunted or critically damped externally shunted Nb/Al-AlOx/Nb junctions with the same critical current density; A is the junction area,Icthe junction critical current, and Rnthe effective shunting resistance.
Planarized Process for Single-Flux-Quantum Circuits With Self-Shunted Nb/NbxSi1−x/Nb Josephson Junctions
We describe our process for fabricating single-flux-quantum circuits for applications in communications metrology, advanced computing, and quantum information. The process flow includes four superconducting metal layers, one junction layer, one palladium-gold bias resistor layer, and a contact pad layer. Planarization using chemical-mechanical polishing is performed on the two lower insulating layers. This process is based on Josephson junctions with niobium superconducting electrodes and self-shunted, amorphous niobium-doped silicon barriers on the insulating side near the metal-insulator transition. The barrier material is deposited by cosputtering silicon and niobium, with the junction properties controlled by the relative sputtering powers and the duration of the barrier deposition step. The profiles of the deposition rates across 3-in (76.2 mm) wafers give a corresponding radial profile of the critical current density Jcthat increases by ~46% from the center to the edge of the wafer. To characterize our process, we have measured and show data for niobium metal quality and its magnetic penetration depth, as well as for wire and via inductances, and for via critical currents. The uniformity of the junction critical current Icacross a wafer was measured on test chips with 2.7-μm-diameter junctions. Within a 5 mm × 5 mm area, the standard deviation of Icwas ~2% for chips near the center of the wafer and up to ~7% for chips near the edge. We also describe process improvements and innovations under development aimed at increasing circuit density and high-speed performance.
ABSTRACT: Active superconducting circuits based on picoseconds switching, i.e. THz oscillating, Josephson tunnel junctions are expected to find a large domain of applications in spatial sub-millimeter wave and FIR detectors as well as in satellite based wideband signal and data processors. In the first case SIS (superconductor-insulator-superconductor) tunnel junctions are required, while in the second case SNS (superconductor-normal metal-superconductor) self-shunted junctions are preferred. We present the advantages of the nitride junction technology currently developed at CEA-Grenoble, based on high-performance MTS (medium temperature superconductor) NbN films in both SIS and SNS junctions. In the SIS case the device performances rely on a sputter deposited and post-annealed, only 0.5-0.7 nm thick, dielectric MgO barrier. This leads to junctions with a Josephson critical current in the range of 10-25 kA/cm, and a large superconducting energy gap (> 5 meV) associated with a low sub-gap quasi-particle leakage current. These parameters are suitable for low “noise temperature ” heterodyne mixers, local oscillators, and integrated receivers in the 0.8 to 1.4 THz frequency range. In the SNS case, a new