Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE Transactions on Applied Superconductivity

Design and testing of quasi-one junction SQUID-based comparators at low and high speed for superconductive flash A/D convertors

Paul D. Bradley, H. Dang

Published Jan 1, 1991• 16 citations
Publisher

Abstract

The fabrication and testing of single comparators at low and high speeds (up to 10-GHz input bandwidth) to determine basic functionality, dynamic range, linearity, noise level, and dynamic distortions are described. A 4-b converter was tested at low speed without errors. The results indicate that a 6-b converter may be constructed of these comparators with very good linearity and 8 b should be achievable with slight design modification. The comparator was demonstrated to have an aperture uncertainty>

DOI
10.1109/77.84627

Related papers

Modified quasi-one-junction SQUID and read-out system as a comparator for high speed analog-to-digital conversion

I. A. Powell, Willem Jakobus Perold

We have designed and simulated a comparator, based on the quasi-one-junction superconducting quantum interference device (SQUID) and a non-symmetrical two-junction SQUID read-out system. This comparator can be utilized to construct an n-bit analog-to-digital convertor with only n comparators. The theoretical input bandwidth is in the GHz range.

IEEE AFRICON•Jan 20, 2003•0 citations

High Tc Superconducting Flash A/D Converter Using Planar Quasi-One Junction Superconducting Quantum Interference Devices (SQUIDs)

Toshimasa Umezawa, T. Fujita, Yasushi Higashino

We have designed and fabricated a planar HTS (DyBaCuO) superconducting quasi-one junction (QOS) Superconducting Quantum Interference Device (SQUID) for a flash A/D converter using step-edge Josephson junctions. The simulation suggests that the HTS QOS bandwidth is limited with 2.6 GHz by an external shunted capacitor. To fabricate a 1–2 µ m size SQUID inductance hole and step-edge junctions, a stepper photo-lithography process was employed. To make a sensitive comparator, a flux transformer was directly installed on the QOS, whose magnetic field gain of 833 was in agreement with the designed value of 828. The basic analog to digital conversion test of the QOS comparator was confirmed at a frequency of 10 kHz–1 MHz at 77 K. The dynamic range was estimated as 2Φ0.

Japanese Journal of Applied Physics•Aug 1, 1996•1 citation

A 6-bit Josephson flash A/D converter with GHz input bandwidth

Paul D. Bradley

Edge-triggered periodic comparators based on low-inductance superconducting quantum interference devices (SQUIDs) have been combined with a 5-mV step generator used as a clocked power supply to produce an analog-to-digital (A/D) converter with the widest input bandwidth of which the author is aware. The noise and linearity have been measured to be more than adequate for 6 b. Asynchronous beat frequency tests indicate that the current design is capable of about four effective bits resolution at 5-GHz input bandwidth and 3 b at 10 GHz. The aperture jitter at 6-GHz clock rates has been measured to be 100 fs rms indicating that the intrinsic noise is low enough to permit subpicosecond aperture times in faster designs. Further advantages include tolerance of large critical current variations and a sinewave clock as the only high-speed waveform necessary to drive the circuit. The amplitude and spectral purity of the sinewave are not critical as long as it reaches a threshold value, since it is regulated by the step generator.>

IEEE Transactions on Applied Superconductivity•Mar 1, 1993•41 citations

Design and testing of QOS comparators for an RSFQ based analog to digital converter

DARREN K. BROCK, S.S. Martinet, Mark F. Bocko +1 more

Successful utilization of the quasi one-junction SQUID (QOS) as a signal comparator for analog-to-digital conversion (ADC) has been demonstrated by several groups, This idea is extended to show how similar comparators can be integrated into an all rapid single flux quantum (RSFQ) digital architecture. Comparators are interrogated by SFQ sampling pulses and in turn give output according to the RSFQ convention. One- and two-bit ADC's have been simulated, fabricated and tested at low speed. Total performance of these devices is estimated within the framework of a multiple bit parallel flash ADC architecture.>

IEEE Transactions on Applied Superconductivity•Jun 1, 1995•10 citations

Multigigahertz performance of a superconducting analog-to-digital converter

Howard Cam Luong, T. Van Duzer

This paper presents the progress we have made on our design, fabrication, and testing of a fully parallel superconducting analog-to-digital converter (ADC) with multi-GHz clock frequencies and input bandwidth. To our best knowledge, this converter is the first flash-type analog-to-digital converter ever reported in Josephson technology that fully integrates a quantizer and a thermometer-to-binary encoder to achieve binary outputs. In this design, the quantizer consists of 2(superscript N-1 comparators, each of which is realized using a hysteretic one- junction sampling SQUID driving a two-junction readout SQUID. A new logic family has been designed based on the same comparator building block and has been used to implement the thermometer-to- binary encoder. Taking advantage of the fact that the encoder's input is thermometer-coded, we have designed three-input and four-input quasi-XOR gates with only three NAND gates and therefore reduced significantly the total gate count. Functionalities of all the sub-circuits have been verified experimentally at clock frequencies up to 3 GHz, which is limited by our currently available testing equipment.

Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE•Jul 2, 1994•0 citations

High-speed experiments on a QFP-based comparator for ADCs with 18-GHz sample rate and 5-GHz input frequency

Y. Harada, J.B. Green

The authors report on the high-speed operation of a superconducting comparator circuit, based on coupling the quantum flux parametron (QFP) to an RF SQUID, which can be used to build a flash-type analog-to-digital converter (ADC). Simulations of this circuit show that it is expected to achieve operation with input signal bandwidths greater than 4 GHz and with a dynamic range equal to at least 4 b of resolution. A QFP-based comparator fabricated with a process using NbN/Pb-alloy Josephson junctions of 5 mu m by 5 mu m and a current density of 100 A/cm/sup 2/ has been examined to evaluate the properties of the QFP-ADC. Analog-to-digital conversion of the comparator has been observed with a QFP activation frequency up to 18.2 GHz. By employing a sampling method, input signals with frequencies up to 5.4 GHz have also been digitized.>

IEEE Transactions on Applied Superconductivity•Mar 1, 1992•10 citations
The fabrication and testing of single comparators at low and high speeds (up to 10-GHz input bandwidth) to determine basic functionality, dynamic range, linearity, noise level, and dynamic distortions are described. A 4-b converter was tested at low speed without errors. The results indicate that a 6-b converter may be constructed of these comparators with very good linearity and 8 b should be achievable with slight design modification. The comparator was demonstrated to have an aperture uncertainty>
We have designed and fabricated a planar HTS (DyBaCuO) superconducting quasi-one junction (QOS) Superconducting Quantum Interference Device (SQUID) for a flash A/D converter using step-edge Josephson junctions. The simulation suggests that the HTS QOS bandwidth is limited with 2.6 GHz by an external shunted capacitor. To fabricate a 1–2 µ m size SQUID inductance hole and step-edge junctions, a stepper photo-lithography process was employed. To make a sensitive comparator, a flux transformer was directly installed on the QOS, whose magnetic field gain of 833 was in agreement with the designed value of 828. The basic analog to digital conversion test of the QOS comparator was confirmed at a frequency of 10 kHz–1 MHz at 77 K. The dynamic range was estimated as 2Φ0.
Edge-triggered periodic comparators based on low-inductance superconducting quantum interference devices (SQUIDs) have been combined with a 5-mV step generator used as a clocked power supply to produce an analog-to-digital (A/D) converter with the widest input bandwidth of which the author is aware. The noise and linearity have been measured to be more than adequate for 6 b. Asynchronous beat frequency tests indicate that the current design is capable of about four effective bits resolution at 5-GHz input bandwidth and 3 b at 10 GHz. The aperture jitter at 6-GHz clock rates has been measured to be 100 fs rms indicating that the intrinsic noise is low enough to permit subpicosecond aperture times in faster designs. Further advantages include tolerance of large critical current variations and a sinewave clock as the only high-speed waveform necessary to drive the circuit. The amplitude and spectral purity of the sinewave are not critical as long as it reaches a threshold value, since it is regulated by the step generator.>
Successful utilization of the quasi one-junction SQUID (QOS) as a signal comparator for analog-to-digital conversion (ADC) has been demonstrated by several groups, This idea is extended to show how similar comparators can be integrated into an all rapid single flux quantum (RSFQ) digital architecture. Comparators are interrogated by SFQ sampling pulses and in turn give output according to the RSFQ convention. One- and two-bit ADC's have been simulated, fabricated and tested at low speed. Total performance of these devices is estimated within the framework of a multiple bit parallel flash ADC architecture.>
This paper presents the progress we have made on our design, fabrication, and testing of a fully parallel superconducting analog-to-digital converter (ADC) with multi-GHz clock frequencies and input bandwidth. To our best knowledge, this converter is the first flash-type analog-to-digital converter ever reported in Josephson technology that fully integrates a quantizer and a thermometer-to-binary encoder to achieve binary outputs. In this design, the quantizer consists of 2(superscript N-1 comparators, each of which is realized using a hysteretic one- junction sampling SQUID driving a two-junction readout SQUID. A new logic family has been designed based on the same comparator building block and has been used to implement the thermometer-to- binary encoder. Taking advantage of the fact that the encoder's input is thermometer-coded, we have designed three-input and four-input quasi-XOR gates with only three NAND gates and therefore reduced significantly the total gate count. Functionalities of all the sub-circuits have been verified experimentally at clock frequencies up to 3 GHz, which is limited by our currently available testing equipment.
The authors report on the high-speed operation of a superconducting comparator circuit, based on coupling the quantum flux parametron (QFP) to an RF SQUID, which can be used to build a flash-type analog-to-digital converter (ADC). Simulations of this circuit show that it is expected to achieve operation with input signal bandwidths greater than 4 GHz and with a dynamic range equal to at least 4 b of resolution. A QFP-based comparator fabricated with a process using NbN/Pb-alloy Josephson junctions of 5 mu m by 5 mu m and a current density of 100 A/cm/sup 2/ has been examined to evaluate the properties of the QFP-ADC. Analog-to-digital conversion of the comparator has been observed with a QFP activation frequency up to 18.2 GHz. By employing a sampling method, input signals with frequencies up to 5.4 GHz have also been digitized.>