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IEEE Transactions on Applied Superconductivity

High-speed experiments on a QFP-based comparator for ADCs with 18-GHz sample rate and 5-GHz input frequency

Y. Harada, J.B. Green

Published Mar 1, 1992• 10 citations
Publisher

Abstract

The authors report on the high-speed operation of a superconducting comparator circuit, based on coupling the quantum flux parametron (QFP) to an RF SQUID, which can be used to build a flash-type analog-to-digital converter (ADC). Simulations of this circuit show that it is expected to achieve operation with input signal bandwidths greater than 4 GHz and with a dynamic range equal to at least 4 b of resolution. A QFP-based comparator fabricated with a process using NbN/Pb-alloy Josephson junctions of 5 mu m by 5 mu m and a current density of 100 A/cm/sup 2/ has been examined to evaluate the properties of the QFP-ADC. Analog-to-digital conversion of the comparator has been observed with a QFP activation frequency up to 18.2 GHz. By employing a sampling method, input signals with frequencies up to 5.4 GHz have also been digitized.>

DOI
10.1109/77.124924

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The authors report on the high-speed operation of a superconducting comparator circuit, based on coupling the quantum flux parametron (QFP) to an RF SQUID, which can be used to build a flash-type analog-to-digital converter (ADC). Simulations of this circuit show that it is expected to achieve operation with input signal bandwidths greater than 4 GHz and with a dynamic range equal to at least 4 b of resolution. A QFP-based comparator fabricated with a process using NbN/Pb-alloy Josephson junctions of 5 mu m by 5 mu m and a current density of 100 A/cm/sup 2/ has been examined to evaluate the properties of the QFP-ADC. Analog-to-digital conversion of the comparator has been observed with a QFP activation frequency up to 18.2 GHz. By employing a sampling method, input signals with frequencies up to 5.4 GHz have also been digitized.>
A flash-type superconducting A/D (analog/digital) converter is proposed. The basis low-frequency operation of this converter, which compromises a quantum flux parametron (QFP) and an RF SQUID (superconducting quantum interference device), has been observed. The RF SQUID consists of a Josephson junction and a load inductor which is part of the QFP. It converts an analog signal to period digital signals of one quantum flux (2.07*10/sup -5/ W-b) per cycle. The QFP works as both an amplifier and a comparator of the periodic digital signals, by adding an exciting signal. This A/D converter is expected to achieve high-speed operation of 20 GHz. Several 4-bit A/D converter circuits were fabricated, using the conventional Nb-Pb alloy process, with a junction size of 5 mu m*5 mu m and supercurrent density of 200 A/cm/sup 2/. Basic operation at 100 KHz was confirmed experimentally.>
We compare the SQUID wheel/Quantum Flux Parametron (QFP) comparator to a new Rapid Single Flux Quantum (RSFQ) compatible design. Both have been simulated to demonstrate /spl sim/0.5 ps threshold accuracy which would permit the construction of a flash analog-to-digital converter with six effective bits of resolution at 10 GHz input bandwidth, over three times better than the best performance demonstrated with any technology, At lower input frequencies, both designs have demonstrated that a 10-bit flash ADC is possible. Although simulations of the QFP-based design are more accurate at high signal slew rates due to its symmetry, the RSFQ-based design has a better signal-to-noise ratio and a faster and more flexible clocking scheme which ultimately prove to be more important.
We have designed a fully integrated 5-bit flash-type single-flux quantum (SFQ) analog-to-digital converter (ADC), in which an error correction and a bit-interleaving circuit are integrated with complementary quasi-one-junction SQUID (CQOS) comparators, and we verified its operation in experiments. Two types of look-back error correction circuits with different clock schemes were designed for the integrated ADCs to avoid the gray zone in comparators and to convert gray code to binary code. The interleaving circuit was also used in the ADC to add one extra bit. A binary 5-bit A/D converter was integrated into an IC chip. Then, input waveforms at low frequencies were successfully retrieved from the binary data of the A/D converter without any errors. We also confirmed that the A/D converter operated properly by conducting tests in our cryocooling system using a 4K-GM cryocooler after the chip was flip-chip bonded onto a multi-chip-module (MCM) carrier. We also used the beat frequency method to test and confirm that the CQOS comparator operated effectively at high frequency, i.e., 3 bits at 15 GHz in the binary code operation and 4 bits at 15 GHz in the gray code operation. Furthermore, operations at sampling frequencies of up to 32 and 50 GHz with a low-frequency analog input signal were experimentally confirmed for a 4-bit comparator circuit with a critical current density Jcof 2.5 kA/cm2and 10 kA/cm2, respectively.
This paper presents the progress we have made on our design, fabrication, and testing of a fully parallel superconducting analog-to-digital converter (ADC) with multi-GHz clock frequencies and input bandwidth. To our best knowledge, this converter is the first flash-type analog-to-digital converter ever reported in Josephson technology that fully integrates a quantizer and a thermometer-to-binary encoder to achieve binary outputs. In this design, the quantizer consists of 2(superscript N-1 comparators, each of which is realized using a hysteretic one- junction sampling SQUID driving a two-junction readout SQUID. A new logic family has been designed based on the same comparator building block and has been used to implement the thermometer-to- binary encoder. Taking advantage of the fact that the encoder's input is thermometer-coded, we have designed three-input and four-input quasi-XOR gates with only three NAND gates and therefore reduced significantly the total gate count. Functionalities of all the sub-circuits have been verified experimentally at clock frequencies up to 3 GHz, which is limited by our currently available testing equipment.
Successful utilization of the quasi one-junction SQUID (QOS) as a signal comparator for analog-to-digital conversion (ADC) has been demonstrated by several groups, This idea is extended to show how similar comparators can be integrated into an all rapid single flux quantum (RSFQ) digital architecture. Comparators are interrogated by SFQ sampling pulses and in turn give output according to the RSFQ convention. One- and two-bit ADC's have been simulated, fabricated and tested at low speed. Total performance of these devices is estimated within the framework of a multiple bit parallel flash ADC architecture.>
A wide variety of applications, ranging from radio-frequency (RF) receivers for broadband communications and signal detection, on earth and in space, would benefit from high-performance superconductor analog-to-digital converters (ADCs), based on magnetic flux quantization and fast switching Josephson junctions. Superconductor ADCs are capable of very high sample rates (100 GHz or more), very high linearity, and high sensitivity. Nyquist-rate ADCs use the high sample rate to digitize a wide instantaneous bandwidth (tens of GHz) and are useful for wideband spectrum monitoring as well as high-end scientific instrumentation. Delta and delta-sigma oversampling ADCs use the high linearity to achieve programmable trade-off between dynamic range and instantaneous bandwidth. These lowpass and bandpass ADCs have been used for direct digitization of narrower (tens to hundreds of MHz) RF bands in the 1-20 GHz range for a variety of communications, intelligence, electronic warfare, and radar applications. Another application area of these cryogenic ADCs is for outputs of cryogenic sensor arrays and terahertz mixers. Recent advances in various classes of ADCs for different applications are described.