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IEEE Transactions on Applied Superconductivity

Feedback-current-injection-type second-order lowpass sigma-delta modulator

S. Hirano, H. Hasegawa, Shuichi Nagasawa, Susumu Katō, Kazunori Miyahara, Yûji Enomoto

Published Jun 1, 2003• 5 citations
Publisher

Abstract

In order to establish double-loop feedback design, we have fabricated a prototype superconducting double-loop lowpass sigma-delta modulator. For digital feedback gain, multiple flux quanta are produced by a ladder circuit and carried through Josephson Transmission Lines (JTLs) to the feedback driver. The feedback driver consists of a single Josephson junction or two serially-connected junctions. Direct injection of the pulse current from the JTLs through a low-value resistor drives the feedback driver. The sigma-delta modulator was operated at the sampling frequency of 1.1 GHz and the measured power spectrum showed the noise shaping roughly of 12 dB/octave, which is characteristic of the second-order sigma-delta modulator.

DOI
10.1109/tasc.2003.813913

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We have been developing a superconducting second-order sigma-delta analog-to-digital converter with a large bandwidth and a large dynamic range for software radio applications. In a superconducting second-order sigma-delta modulator utilizing a passive integrator and single-flux-quantum (SFQ) feedback, gain to compensate the large attenuation in the passive integrator of the modulator is required to obtain a large dynamic range. In this paper, a second-order modulator utilizing multi-flux-quantum (MFQ) generators creating the needed gain is reported and the design and experimental test results of the elementary circuits including a comparator, a first-order modulator, and the MFQ generator are described. The digital outputs of the comparator and the first-order modulator were experimentally evaluated, where the input dependence of the comparator switching probability and the noise-shaping properties of the modulator were clearly observed. The low speed operation of the MFQ generator creating three SFQ pulses was experimentally confirmed. The other circuits were also tested at low frequencies.
The sigma-delta architecture is the method of choice for analog-to-digital converters (ADCs) for high dynamic range applications. This architecture uses oversampling and precise feedback to generate a shaped spectral distribution of the quantization noise. Subsequent digital filtering suppresses out-of-band quantization noise, yielding a large signal to in-band noise ratio. A unique advantage of superconducting electronics is the availability of the flux quantum to provide quantum mechanically accurate feedback at GHz rates. Josephson digital technology extends sigma-delta ADCs from MHz sampling rates to GHz sampling rates, from kHz signal bandwidths to MHz signal bandwidths, with comparable or better dynamic range when compared to semiconductor implementations. This paper presents circuits for Josephson sigma-delta ADCs, including single-loop and double-loop modulators operating at sampling rates up to 2 GHz, and circuits for quantized feedback. The first demonstration of double-loop noise shaping is also presented.
Superconducting digital circuits are capable of producing high dynamic range analog-to-digital converters (ADCs). We present sigma-delta architectures using large (>100) oversampling ratios to give signal-to-noise ratios of greater than 100 dB in simulation. Three distinct designs, using two distinct mechanisms for feedback, are presented. All of the designs use only shunted junctions, and are therefore compatible with HTS SNS junctions. Simulations are presented for a modulator which creates feedback pulses by SQUID lobe-crossings, a modulator which uses the transresistance of a SQUID for feedback, and a modulator which uses threshold crossings in both the first and second loops for feedback.
High performance oversampling delta-sigma data converters require high clock rates and accurate feedback of the digital output to the analog regime. Superconductor modulators offer the unique advantages of clock rates in the tens-of-gigahertz, comparator switching energy below attoJoules, and quantum-accurate digital-to-analog feedback. We have designed a two-loop baseband modulator whose noise transfer function was calculated using a simple, linear circuit model. The circuit was fabricated in a commercial superconductor IC process with 4.5 kA-per-square cm Josephson junctions and 1.5 micron minimum feature size. The circuit was tested at a derated sample rate of 5 GHz. Measured signal-to-noise dynamic range was 81 dB over a 10 MHz band. Third-order intercept was measured to be +24 dBsat in two-tone test. The measured noise transfer function was in excellent agreement with our linear model. The linear model indicates that with appropriate parameter values, this family of modulators extrapolates to significantly higher performance.
A new frequency multiply circuit generating a 20 GHz sampling clock from an external 5 GHz signal for a lowpass sigma-delta modulator was proposed and designed. The multiply circuit was composed of a ladder circuit, a modified Josephson transmission line (JTL) and T-flip flop (T-FF). We confirmed by numerical simulation that the period jitter of SFQ pulse trains generated by the ladder circuit could be reduced to a value small enough to realize 14-bit resolution for 10 MHz bandwidth by utilizing the repulsion effect between SFQ pulses in the modified JTL. The multiply circuit was fabricated by a 2.5 kA/cm/sup 2/ Nb process, and its correct operation was confirmed.