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IEEE Transactions on Applied Superconductivity

Superconducting second-order sigma-delta modulators utilizing multi-flux-quantum generators

T. Hashimoto, H. Hasegawa, Shuichi Nagasawa, Hideo Suzuki, Kazunori Miyahara, Yûji Enomoto

Published Mar 1, 2001• 12 citations
Publisher

Abstract

We have been developing a superconducting second-order sigma-delta analog-to-digital converter with a large bandwidth and a large dynamic range for software radio applications. In a superconducting second-order sigma-delta modulator utilizing a passive integrator and single-flux-quantum (SFQ) feedback, gain to compensate the large attenuation in the passive integrator of the modulator is required to obtain a large dynamic range. In this paper, a second-order modulator utilizing multi-flux-quantum (MFQ) generators creating the needed gain is reported and the design and experimental test results of the elementary circuits including a comparator, a first-order modulator, and the MFQ generator are described. The digital outputs of the comparator and the first-order modulator were experimentally evaluated, where the input dependence of the comparator switching probability and the noise-shaping properties of the modulator were clearly observed. The low speed operation of the MFQ generator creating three SFQ pulses was experimentally confirmed. The other circuits were also tested at low frequencies.

DOI
10.1109/77.919405

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We have been developing a superconducting second-order sigma-delta analog-to-digital converter with a large bandwidth and a large dynamic range for software radio applications. In a superconducting second-order sigma-delta modulator utilizing a passive integrator and single-flux-quantum (SFQ) feedback, gain to compensate the large attenuation in the passive integrator of the modulator is required to obtain a large dynamic range. In this paper, a second-order modulator utilizing multi-flux-quantum (MFQ) generators creating the needed gain is reported and the design and experimental test results of the elementary circuits including a comparator, a first-order modulator, and the MFQ generator are described. The digital outputs of the comparator and the first-order modulator were experimentally evaluated, where the input dependence of the comparator switching probability and the noise-shaping properties of the modulator were clearly observed. The low speed operation of the MFQ generator creating three SFQ pulses was experimentally confirmed. The other circuits were also tested at low frequencies.
The sigma-delta architecture is the method of choice for analog-to-digital converters (ADCs) for high dynamic range applications. This architecture uses oversampling and precise feedback to generate a shaped spectral distribution of the quantization noise. Subsequent digital filtering suppresses out-of-band quantization noise, yielding a large signal to in-band noise ratio. A unique advantage of superconducting electronics is the availability of the flux quantum to provide quantum mechanically accurate feedback at GHz rates. Josephson digital technology extends sigma-delta ADCs from MHz sampling rates to GHz sampling rates, from kHz signal bandwidths to MHz signal bandwidths, with comparable or better dynamic range when compared to semiconductor implementations. This paper presents circuits for Josephson sigma-delta ADCs, including single-loop and double-loop modulators operating at sampling rates up to 2 GHz, and circuits for quantized feedback. The first demonstration of double-loop noise shaping is also presented.
Superconducting digital circuits are capable of producing high dynamic range analog-to-digital converters (ADCs). We present sigma-delta architectures using large (>100) oversampling ratios to give signal-to-noise ratios of greater than 100 dB in simulation. Three distinct designs, using two distinct mechanisms for feedback, are presented. All of the designs use only shunted junctions, and are therefore compatible with HTS SNS junctions. Simulations are presented for a modulator which creates feedback pulses by SQUID lobe-crossings, a modulator which uses the transresistance of a SQUID for feedback, and a modulator which uses threshold crossings in both the first and second loops for feedback.
In order to establish double-loop feedback design, we have fabricated a prototype superconducting double-loop lowpass sigma-delta modulator. For digital feedback gain, multiple flux quanta are produced by a ladder circuit and carried through Josephson Transmission Lines (JTLs) to the feedback driver. The feedback driver consists of a single Josephson junction or two serially-connected junctions. Direct injection of the pulse current from the JTLs through a low-value resistor drives the feedback driver. The sigma-delta modulator was operated at the sampling frequency of 1.1 GHz and the measured power spectrum showed the noise shaping roughly of 12 dB/octave, which is characteristic of the second-order sigma-delta modulator.
We have proposed a multi-bit sigma-delta analog-to-digital converter (ADC) in which a modulator is composed of a single quantizer and multiple samplers based on the single-flux-quantum (SFQ) circuits. The quantizer converts analog signals to pulse-density-modulated signals, and the samplers sample the modulated SFQ pulses in every sampling clock. Use of multiple samplers based on delayed-flip-flops (DFFs) increases sampling frequencies virtually, resulting in a multi-bit sigma-delta modulator. We also designed a decimation filter by using the well-established Verilog tools for the SFQ circuits and the Matlab simulator. We prepared an ADC including 4 samplers and a second-order decimation filter with the decimation rate of 1:256 based on the Nb junction technology. We confirmed correct operation of this ADC at 56 GHz clock signals generated by an internal ring oscillator. We experimentally obtained the signal-to-noise ratio of 25 dB and spurious-free dynamic range of 37 dB at the bandwidth of 10 MHz from the upper 7 bits of the outputs of the decimation filter.
We designed a superconducting front-end circuit for an analog-to-digital converter and experimentally evaluated its signal-to-noise-ratio (SNR) at a sampling frequency of 10 GHz. The modulator was based on a first-order sigma-delta modulation with an LR integrator. Correct noise shaping was experimentally confirmed, and an SNR of 70.9 dB at a bandwidth of 10 MHz was achieved. In the circuit design, we investigated the effect of leakage in the LR integrator and thermal noise on the SNR by using transfer function analysis and circuit simulations with noise sources. Circuit parameters were designed to keep the discrepancy of the SNR from the ideal value (77.6 dB) within 6 dB. In the experimental evaluation, the modulated data signal from the superconducting chip was accumulated with room-temperature electronics. A fast Fourier transform (FFT) calculation was performed to obtain power spectra and SNRs. The power spectra and SNRs were consistent with the predictions of the transfer function analysis and circuit simulations.
The main topic of this thesis is the evaluation of performance of super-conducting rst- and second-order low-pass sigma-delta modulators. Superconducting electronics comprise characteristics such as very high switching speed, natural quantization, high sensitivity and low noise, proper-ties that are all essential for modulators used in high performance analog-to-digital converters (ADC). Sigma-delta modulators trade speed for improved resolution using feedback mechanisms making superconducting electronics an interesting alternative technology for the implementation. With linear models and device-level simulations the performance of these modulators have been evaluated. The linear model of the rst-order sigma-delta modulator shows that the performance, for a given oversampling ratio, only depends on the cut-o frequency of the RL-lter used. This is veried by device-level simulations and the results from the two methods are in good agreement. Device-level simulations of the second-order sigma-delta modu-