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Superconductor Science and Technology

Design and development of a cryogenic semiconductor amplifier for interfacing RSFQ circuits at 4.2 K

S. Wünsch, E. Crocoll, M. Schubert, G. Wende, H.‐G. Meyer, M. Siegel

Published Oct 18, 2007• 7 citations
Publisher

Abstract

There is a great deal of interest in amplifiers with extremely high bandwidth, low noise and low power consumption which interface RSFQ circuits with commercial room temperature electronics or amplifying SFQ pulses. In this special application a hybrid amplifier should interface an RSFQ circuitry with a Josephson junction array quantizer chip (JA-Q) at 4.2 K. The input signal for the amplifier is generated by an RSFQ signal generator and the output signal fed-in to a Josephson array quantizer. A voltage gain of about 10 4 with a pattern frequency of 2 GHz for a good transfer of the SFQ pulses is required. Additionally, the JA-Q requires a high output current at low power consumption of the amplifier at the same time. Various hybrid amplifiers based on commercially available p-HEMT transistors in an embedded microwave design were designed and characterized. For the p-HEMT transistor characterization at cryogenic temperatures the biasing settings according to an optimum between voltage gain A V and low power consumption P V were determined. Thus a power consumption of P V = 2 mW and a voltage gain of about A V = 4 per stage were achieved. For a preamplifier and an amplifier concept a number of these stages were implemented in a microstrip and a coplanar transmission line design with a special matched interconnect taper towards the RSFQ components. Measurements of the amplifiers and the combination of the amplifiers and the JA-Q at 4.2 K showed their good performance without any disturbances of the quantized voltage steps.

DOI
10.1088/0953-2048/20/11/s11

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There is a great deal of interest in amplifiers with extremely high bandwidth, low noise and low power consumption which interface RSFQ circuits with commercial room temperature electronics or amplifying SFQ pulses. In this special application a hybrid amplifier should interface an RSFQ circuitry with a Josephson junction array quantizer chip (JA-Q) at 4.2 K. The input signal for the amplifier is generated by an RSFQ signal generator and the output signal fed-in to a Josephson array quantizer. A voltage gain of about 10 4 with a pattern frequency of 2 GHz for a good transfer of the SFQ pulses is required. Additionally, the JA-Q requires a high output current at low power consumption of the amplifier at the same time. Various hybrid amplifiers based on commercially available p-HEMT transistors in an embedded microwave design were designed and characterized. For the p-HEMT transistor characterization at cryogenic temperatures the biasing settings according to an optimum between voltage gain A V and low power consumption P V were determined. Thus a power consumption of P V = 2 mW and a voltage gain of about A V = 4 per stage were achieved. For a preamplifier and an amplifier concept a number of these stages were implemented in a microstrip and a coplanar transmission line design with a special matched interconnect taper towards the RSFQ components. Measurements of the amplifiers and the combination of the amplifiers and the JA-Q at 4.2 K showed their good performance without any disturbances of the quantized voltage steps.
The connection of RSFQ circuits with commercial room temperature electronics and amplifying SFQ pulses with high data rates require cryogenic interface amplifiers. Such amplifiers should provide extremely high bandwidth, low noise and low power consumption at the same time. Various hybrid amplifiers based on commercial p-HEMT transistors in an embedded microwave design were designed and characterized. Towards the p-HEMT transistor characterization at cryogenic temperature the biasing settings according to an optimum between voltage gain and low power consumption were determined. Thus a total power consumption of 2 mW and a voltage gain of 12 dB per single stage were achieved. For a preamplifier and an amplifier concept a multiple number of these stages were implemented in a microstrip and a coplanar transmission line design with a special matched interconnect taper towards the RSFQ components. Measurements of the amplifiers, the combination of an amplifier with a RSFQ circuit at 4.2 K showed their good performances without any disturbance of the RSFQ circuit. Due to the losses between the stages a total gain of 25 dB with a four stage amplifier was achieved; pulse rates went up to 3 Gb/s. The total power consumption was in the range of 8 mW. Further increase of data rates will be achieved by improving the matching between RSFQ output stage and amplifier.
Abstract The many advantages of cryogenically cooled single-flux quantum (SFQ) circuits imply that the high speed and low voltage output signals must be amplified and interfaced with standard electronics. State-of-the-art low-noise and wide-band amplifiers are required to interface with room temperature electronics. One solution is to place preamplifiers at the cryogenic stage, which requires specific semiconductor design and fabrication. However, a more viable and energy-efficient approach is to integrate the pulsed logic circuit output stages with on-chip superconductor preamplifiers. We designed, fabricated, and tested an on-chip compact voltage multiplier integrated with the output stage of SFQ circuits to increase the voltage amplitude of SFQ pulses. The circuit is designed with the same technology as the logic circuit hence its noise level is lower, and it works at higher frequencies compared to complementary metal-oxide semi-conductor amplifiers and due to quantized nature of it there is no added noise. The fabricated circuit has a compact size of 160 µ m × 320 µ m and provides about 10 dB gain with measured 600 µ V output voltage at frequencies up to ∼25 GHz in simulations. By stacking more levels, over 20 dB gain at circuit level is achievable as shown in simulations. Moreover the gain of the superconductor voltage amplifier is quantized and programmable.
The cryogenic indium phosphide (InP) high-electron-mobility transistor (HEMT) low-noise amplifier (LNA) is used for the readout amplification of qubits at444K where cooling capabilities are limited implying that the dc power of the active circuits is an essential design constraint. In this article, the RF and noise performance of the InP HEMT under ultralow-power (ULP) operation at444K has been characterized. The small-signal and noise parameter model of the InP HEMT was extracted down to 1μ\muμW. The tradeoff between noise performance and dc power consumption was analyzed in terms of the drain current and drain voltage. A 4–6 GHz hybrid cryogenic HEMT LNA designed for qubit readout and optimized for lowest noise below111mW dc power consumption was fabricated. The measured performance of the LNA at444K attained 23.1 dB average gain and 2.0 K average noise temperature at 200μ\muμW dc power.
A broadband low-noise four-stage high-electron-mobility transistor amplifier was designed and characterized in a cryogen-free dilution refrigerator at the 3.8 K temperature stage. The obtained power dissipation of the amplifier is below 20 mW. In the frequency range from 6 to 12 GHz its gain exceeds 30 dB. The equivalent noise temperature of the amplifier is below 6 K for the presented frequency range. The amplifier is applicable for any type of cryogenic microwave measurements. As an example we demonstrate here the characterization of the superconducting X-mon qubit coupled to an on-chip coplanar waveguide resonator.
Large-scale qubit readout in quantum computing systems requires highly sensitive amplification with minimal power consumption to reduce the thermal load and preserve qubit integrity. We propose a pulse-operated cryogenic low-noise amplifier (LNA) scheme that minimizes the influence of the LNA on qubit operation and reduces power consumption by duty cycling. A modified commercially available cryogenic hybrid LNA based on InP high-electron mobility transistors (HEMTs) has been characterized to demonstrate the feasibility of pulsed operation for qubit readout. The transient noise and gain performance of the LNA were obtained through a cryogenic time domain noise measurement setup with 5-ns time resolution and a measured noise standard deviation (SD) below 0.3 K. The time-domain noise and gain performance of the LNA in response to a square gate voltage waveform were investigated. Through an analysis of the LNA’s recovery limitations, we developed a fast recovery bias strategy leading to the optimization of the gate voltage waveform using a genetic algorithm (GA). This resulted in a strong enhancement of transient noise and gain performance with a recovery time of 35 ns. The drain current transients were measured to calculate the average power consumption of the pulse-operated LNA, which confirmed a reduction in average power consumption proportional to the duty cycle. This work contributes to the development of high-performance and low-power amplifier solutions critical for large-scale qubit readout applications.
Large-scale superconducting quantum computers require massive numbers of high-performance cryogenic low-noise amplifiers (cryo-LNA) for qubit readout. Here we present a C-Band monolithic microwave integrated circuit (MMIC) cryo-LNA for this purpose. This cryo-LNA is based on 150 nm GaAs pseudomorphic high electron mobility transistor (pHEMT) process and implemented with a three-stage cascaded architecture, where the first stage adopts careful impedance match to optimize the noise and return loss. The integration of negative feedback loops adopted in the second and third-stage enhances the overall stability. Moreover, the pHEMT-self bias and current multiplexing circuitry structure facilitate the reduction of power consumption and require only single bias line. Operating at an ambient temperature of 3.6 K and consuming 15 mW, the cryo-LNA demonstrates good performance in the C-band, reaching a 5 K equivalent noise temperature and an average gain of 40 dB. We further benchmark this cryo-LNA with superconducting qubits, achieving an average single-shot dispersive readout fidelity of 98.3% without assistance from a quantum-limited parametric amplifier. The development of GaAs cryo-LNA diversifies technical support necessary for large-scale quantum applications.