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Japanese Journal of Applied Physics

Fabrication of Superconducting Transistors using InAs/(AlGa)Sb Quantum Wells

Toshihiko Maemoto, Hiroyuki Dobashi, Satoshi Izumiya, Kanji Yoh, Masataka Inoue

Published Dec 1, 1994• 7 citations
Publisher

Abstract

We report on a fabrication process of superconducting weak links and superconducting transistors, which contain two-dimensional electrons in InAs/(AlGa)Sb quantum well. The superconducting transistors with lead alloy superconducting contacts were fabricated by using electron beam lithography, lift-off, and wet chemical etching processes. We have succeeded in fabricating a superconducting transistor with 0.4 µ m channel length and 0.17 µ m gate length between superconducting electrodes. Although the ideal performance of superconducting transistors has not been achieved yet, we present the results of superconducting weak links. The process of reducing contact resistance between lead alloy and InAs is also discussed, which is crucial to demonstrate the performance of the superconducting transistor.

DOI
10.1143/jjap.33.7204

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IEEE Transactions on Applied Superconductivity•Jan 1, 2014•10 citations
We report on a fabrication process of superconducting weak links and superconducting transistors, which contain two-dimensional electrons in InAs/(AlGa)Sb quantum well. The superconducting transistors with lead alloy superconducting contacts were fabricated by using electron beam lithography, lift-off, and wet chemical etching processes. We have succeeded in fabricating a superconducting transistor with 0.4 µ m channel length and 0.17 µ m gate length between superconducting electrodes. Although the ideal performance of superconducting transistors has not been achieved yet, we present the results of superconducting weak links. The process of reducing contact resistance between lead alloy and InAs is also discussed, which is crucial to demonstrate the performance of the superconducting transistor.
Superconductor-normal-superconductor (SNS) weak links using a semiconductor as the normal region are of interest for applications in high frequency Josephson devices and in superconducting field effect transistors. Recently, there has been a revival of interest in materials such as InAs which, in principle, allow true SNS structures without tunneling (Schottky) barriers at the electrodes, In this paper we discuss the requirements for semiconductor SNS Josephson and FET devices and describe the fabrication and characterization of planar SNS weak links in which the normal region is InAs, which is part of a heterostructure consisting of a thin (100 nm) layer of n-InAs grown on undoped GaAs. Nb electrodes defined by electron beam lithography have been made with spacings as small as 260 nm. Preliminary measurements indicate that the devices have good electrical behavior which is well explained by SNS weak link theory, using coherence lengths calculated from measured material parameters. These weak links can be the basis for superconducting FET devices, and have the significant advantage of allowing simple device isolation compared with bulk InAs, which was used in earlier work.
Researches on the fabrication of ~ 0.1 × 0.1 μ m 2 superconductor–insulator–superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1–10 μm for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature Tc of Nb (9.2 K ) is higher than the boiling point of He (4.2 K ), and that Nb has excellent stability against thermal cycling between room temperature and liquid- He temperature. For the fabrication of ~ 0.1 × 0.1 μ m 2 junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (Tc = 1.2 K ), however, it is not ideal for Nb . The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb , electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport properties is also included.
Superconducting devices with coplanar electrodes have been fabricated using electron-beam lithography to define the smallest feature. The devices each consist of two Pb-In alloy electrodes, 20 µm wide, deposited on a clean, degenerately doped silicon substrate. The two electrodes are separated by a thin (100-300-nm) gap. Electron-beam lithography is used to define the gap, and sputter etching to remove the underlying alloy film. Depending on the width of the gap and the condition of the metal-semiconductor interface, these devices displayed either Josephson or super-Schottky diode behavior. The Josephson devices show a high degree of robustness and hadI_{c}Rproducts in the range 200-800 µV at 4.2 K. The super-Schottky diodes had current sensitivities S in the range 1000-1300 V-1when measured at 4.2 K.
Abstract Superconducting circuits based on hybrid InAs Josephson Junctions (JJs) play a starring role in the design of fast and ultra‐low power consumption solid‐state quantum electronics and exploring novel physical phenomena. Conventionally, 3D substrates, 2D quantum wells (QWs), and 1D nanowires (NWs) made of InAs are employed to create superconducting circuits with hybrid JJs. Each platform has its advantages and disadvantages. Here, the InAs‐on‐insulator (InAsOI) is proposed as a groundbreaking platform for developing superconducting electronics. An epilayer of semiconducting InAs with different electron densities is grown onto an InAlAs metamorphic buffer, efficiently used as a cryogenic insulator to decouple adjacent devices electrically. JJs with various lengths and widths are fabricated employing Al as a superconductor and InAs with different electron densities. A switching current density of 7.3 µA µm−1, a critical voltage of 50‐to‐80 µV, and a critical temperature equal to that of the superconductor used are achieved. For all the JJs, the switching current follows a Fraunhofer‐like pattern with the out‐of‐plane magnetic field. These achievements enable the use of InAsOI to design and fabricate surface‐exposed Josephson Field Effect Transistors with high critical current densities and superior gating properties.
Qubits on solid state devices could potentially provide the rapid control necessary for developing scalable quantum information processors. Materials innovation and design breakthroughs have increased functionality and coherence of qubits substantially over the past two decades. Here, we show by improving interface between InAs as a semiconductor and Al as a superconductor, one can reliably fabricate voltage-controlled Josephson junction field effect transistor (JJ-FET) that can be used as tunable qubits, resonators, and coupler switches. We find that bandgap engineering is crucial in realizing a two-dimensional electron gas near the surface. In addition, we show how the coupling between the semiconductor layer and the superconducting contacts can affect qubit properties. We present the anharmonicity and coupling strengths from one and two-photon absorption in a quantum two level system fabricated with a JJ-FET.
To implement a large-scale integration of superconducting quantum bits (qubits), we have investigated a process of fabricating submicrometer Al/AlOx/Al trilayer Josephson junctions. Moreover, on the basis of this process, we developed a means of fabricating different kinds of superconducting qubits. Superconducting qubits require not only small junctions, but also peripheral circuit elements, such as a large resonator, on the same chip. As a result, we chose to use planarization in the self-aligned junction contact formation, which suppressed a pattern-area-dependence of the chemical-mechanical polishing rate. In addition, Al fine wires with a width of 0.2 μm were required in some parts of the qubits to increase the coupling strength between the SQUIDs and qubits. We developed a two-step etching process to form such fine wires using i-line photoresist, which had a high etching resistance. The operation of three-junction flux qubits was confirmed in a dilution refrigerator.