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IEEE Transactions on Electron Devices

Silicon-coupled Josephson junctions and super-Schottky diodes with coplanar electrodes

Rich Ruby, T. Van Duzer

Published Nov 1, 1981• 39 citations
Publisher

Abstract

Superconducting devices with coplanar electrodes have been fabricated using electron-beam lithography to define the smallest feature. The devices each consist of two Pb-In alloy electrodes, 20 µm wide, deposited on a clean, degenerately doped silicon substrate. The two electrodes are separated by a thin (100-300-nm) gap. Electron-beam lithography is used to define the gap, and sputter etching to remove the underlying alloy film. Depending on the width of the gap and the condition of the metal-semiconductor interface, these devices displayed either Josephson or super-Schottky diode behavior. The Josephson devices show a high degree of robustness and hadI_{c}Rproducts in the range 200-800 µV at 4.2 K. The super-Schottky diodes had current sensitivities S in the range 1000-1300 V-1when measured at 4.2 K.

DOI
10.1109/t-ed.1981.20620

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Superconducting devices with coplanar electrodes have been fabricated using electron-beam lithography to define the smallest feature. The devices each consist of two Pb-In alloy electrodes, 20 µm wide, deposited on a clean, degenerately doped silicon substrate. The two electrodes are separated by a thin (100-300-nm) gap. Electron-beam lithography is used to define the gap, and sputter etching to remove the underlying alloy film. Depending on the width of the gap and the condition of the metal-semiconductor interface, these devices displayed either Josephson or super-Schottky diode behavior. The Josephson devices show a high degree of robustness and hadI_{c}Rproducts in the range 200-800 µV at 4.2 K. The super-Schottky diodes had current sensitivities S in the range 1000-1300 V-1when measured at 4.2 K.
An understanding of the role of alloying elements in lead thin films for use as Josephson junctions was achieved, and thermally cyclable devices were made. Gold is one of the elements which strongly inhabit the movement of grain boundaries and thus prevent the growth of hillocks and whiskers on the film which would puncture the thin oxide barrier. A new technology in which thin silicon membranes supported by a surrounding frame can be used for device fabrication was developed. This includes a double-etching scheme to achieve even submicron size membranes having thickness of no more than a few hundred angstroms. We have shown that advantages can be had by fabricating Schottky and super-Schottky diodes on such membranes. Also, Josephson junctions made this way show promise of great design flexibility and may develop into the best Josephson device for mixing and detection. Two ways of making double weak superconducting links for possible use as switching elements were tested. It appears that the impedance level is lower than would be desired for that application for the dimensions used so far but fabrication by electron lithography would increase it. The semiconductor barrier is analyzed, as a possible Josephson junction switching element and itmore » appears to have some advantages. One of these is a lower Q for the junction cavity; our analysis shows about two orders of magnitude improvement in this regard over oxide-barrier junctions. (GRA)« less
Superconductor-normal-superconductor (SNS) weak links using a semiconductor as the normal region are of interest for applications in high frequency Josephson devices and in superconducting field effect transistors. Recently, there has been a revival of interest in materials such as InAs which, in principle, allow true SNS structures without tunneling (Schottky) barriers at the electrodes, In this paper we discuss the requirements for semiconductor SNS Josephson and FET devices and describe the fabrication and characterization of planar SNS weak links in which the normal region is InAs, which is part of a heterostructure consisting of a thin (100 nm) layer of n-InAs grown on undoped GaAs. Nb electrodes defined by electron beam lithography have been made with spacings as small as 260 nm. Preliminary measurements indicate that the devices have good electrical behavior which is well explained by SNS weak link theory, using coherence lengths calculated from measured material parameters. These weak links can be the basis for superconducting FET devices, and have the significant advantage of allowing simple device isolation compared with bulk InAs, which was used in earlier work.
We describe the design, fabrication, and characterization of superconducting In0.47Ga0.53As junction field-effect transistors (JFETs) with Nb source and drain electrodes. In0.47Ga0.53As has the advantage of combining large coherence length and high Schottky barrier transmission, making it a very attractive material on which to base superconducting FETs. At large voltages these devices behave as normal FETs in either enhancement or depletion modes, while at small voltages they act as Josephson junctions or super-Schottky diodes. Both normal and super- currents are controlled by the gate.
In view of future macroscopic quantum experiments, we have fabricated prototypes of charge qubits (with tunable Josephson coupling and capacitive gate) provided with capacitively coupled readout single-electron transistor electrometers. The devices are prepared by electron beam direct-writing in conjunction with material deposition by sputtering. All leads are made of Al, and the AlO/sub x/ tunnel barriers are generated by local thermal oxidizing of the surface of the base striplines. The island electrodes are made of Al or Nb in a subsequent deposition step. In the case of Nb it is suitable to protect the barriers by a thin sputtered Al film first. The small-area (100 nm/spl times/100 nm) tunnel junctions have capacitances in the order of a few 10/sup -16/ F; their resistances can be adjusted in a wide range from k/spl Omega/ to M/spl Omega/ with an on-chip spread of less than 10%. The (double) superconducting gap energy was determined to be about 0.4 meV for Al and 1.4 meV for Nb, respectively. Measuring the so-called Coulomb staircase, we have demonstrated the operation of both qubit boxes and sub-e electrometers.
Researches on the fabrication of ~ 0.1 × 0.1 μ m 2 superconductor–insulator–superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1–10 μm for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature Tc of Nb (9.2 K ) is higher than the boiling point of He (4.2 K ), and that Nb has excellent stability against thermal cycling between room temperature and liquid- He temperature. For the fabrication of ~ 0.1 × 0.1 μ m 2 junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (Tc = 1.2 K ), however, it is not ideal for Nb . The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb , electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport properties is also included.