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Physica C Superconductivity

LTS junction technology for RSFQ and qubit circuit applications

F.-I. Buchholz, D Balashov, R. Dolata, Daniel Hagedorn, M. Khabipov, J. Kohlmann, Alexander B Zorin, J. Niemeyer

Published Jul 25, 2006• 3 citations
Publisher
DOI
10.1016/j.physc.2006.05.059

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At PTB, a new type of fabrication process has been developed to verify rapid single flux quantum (RSFQ) integrated circuits based on intrinsically shunted two-tunnel Josephson junctions (JJs). The process has been realized in LTS implementation using SINIS technology. A variety of single JJs, junction arrays and test circuits have been fabricated and experimentally investigated. The critical current densities of the junctions were set to a nominal value of j C = 500 A cm -2 , with values of the characteristic voltage V C equal to or larger than 160 µV. The JJs show nearly hysteresis-free behaviour (less than 10%); the intrawafer parameter spread is smaller than ±10%. Various basic RSFQ circuits have been realized with operation margins of bias currents of larger than ±20%.
The manufacturing process of LTS RSFQ circuits is quite similar to that of the semiconductor chips, thus providing the possibility of an ultra high-density packaging similar to the modern semiconductor logic circuits. However, the miniaturization of the interconnects does not enhance their performance. The present work highlights the impact of the parasitic interactions between the superconductive interconnects on the correct logical functionality and the upper bias current margins of the LTS RSFQ circuits.
One of the remaining challenges in the application of superconducting electronics is the interfacing between superconducting and semiconducting environments. The voltage and speed mismatch between RSFQ pulses and semiconducting read-out electronics makes it necessary to amplify as well as stretch the RSFQ pulses. Moreover, circuits based on HTS (High Temperature Superconductor) technology are very attractive since they can operate under considerably relaxed cooling effort, which is one of the main problems with LTS (Low Temperature Superconductor) circuits. Within the European project SuperADC, a HTS second order sigma delta modulator and a pulse stretcher, used as an interface between the modulator and the first semi-conducting amplifier stage, have been designed at Twente University and will be presented here.