RSFQ Logic/Memory Family: A New Josephson-Junction Technology for

K. K. Likharev, Vasili K. Semenov

Recent developments concerning the rapid single-flux-quantum (RSFQ) circuit family are reviewed. Elementary cells in this circuit family can generate, pass, memorize, and reproduce picosecond voltage pulses with a nominally quantized area corresponding to transfer of a single magnetic flux quantum across a Josephson junction. Functionally, each cell can be viewed as a combination of a logic gate and an output latch (register) controlled by clock pulses, which are physically similar to the signal pulses. Hand-shaking style of local exchange by the clock pulses enables one to increase complexity of the LSI RSFQ systems without loss of operating speed. The simplest components of the RSFQ circuitry have been experimentally tested at clock frequencies exceeding 100 GHz, and an increase of the speed beyond 300 GHz is expected as a result of using an up-to-date fabrication technology. This review includes a discussion of possible future developments and applications of this novel, ultrafast digital technology.>

Anna Kidiyarova-Shevchenko, Alexander F. Kirichenko

Stanislav V. Polonsky

Single flux quantum (SFQ) pulses used by the elements of RSFQ logic/memory family should be transformed into the usual DC-voltage form before leaving an RSFQ chip. To provide a high output voltage level (about the gap voltage V g ) the author suggests an SFQ/DC converter using unshunted hysteresis Josephson junctions. The converter employs a DC flip-flop of a HUFFLE type. It does not require AC power supply and can easily be integrated with the RSFQ elements.

Ahmedullah Aziz, Shamiul Alam

Oleg A. Mukhanov, Vasili K. Semenov, Konstantin K. Likharev

A new family of dc-powered Josephson junction digital devices, the Rapid Single Flux Quantum (RSFQ) logic, is described. The devices use overdamped Josephson junctions and two-junction interferometers to store, pass and process the digital information presented in form of single flux quanta. We have carried out extensive numerical simulation of the dynamics of the RSFQ logic gates and of some more complex circuits including serial full adder and reversible shift register, within the standard microscopic-theory ("Werthamer") description of Josephson junctions. The minimum clock cycles of the basic RSFQ circuits turn out to be as small as 2.5 ps. The most promising ways to use the RSFQ logic circuits at the present stage of development of the Josephson junction digital technology are discussed.