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IEEE Transactions on Applied Superconductivity

A niobium nitride-based analog to digital converter using rapid single flux quantum logic operating at 9.5 K

Masoud Radparvar

Published Jun 1, 1994• 14 citations
Publisher

Abstract

An analog to digital converter (ADC) using the rapid single flux quantum (RSFQ) logic family implemented in niobium nitride (NbN) technology is described. The circuit was originally developed and demonstrated in niobium technology. An identical circuit was then laid out, fabricated and demonstrated in NbN technology. The chips were fabricated using an eight-layer NbN-based process with Josephson junction critical current density of 500 A/cm/sup 2/. In this paper, we report on the measurement results for a 6-bit flux quantizing ADC which exhibited proper operation and good DC bias margins. We also demonstrate results from an ADC chip operating up to 9.5 K.>

DOI
10.1109/77.291697

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We describe the design of an oversampling single-flux-counting analog-to-digital converter with the estimated bandwidth of a few tens of MHz, based on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an input analog circuit, high-speed quantizer with an original analog/digital negative feedback loop, decimation (comb) filter, and supporting subsystems including clock distribution circuits, quantization signal conditioner, and output drivers. We have applied a new approach, the 'symmetrizing' negative feedback, to free the quantizer from the intrinsic hysteresis without dynamic range sacrifice. The 16-bit version of the system comprises about 1,500 Josephson junctions and consumes 1.2 mW of DC power, when implemented using Nb-trilayer technology with 1 kA/cm/sup 2/, 3.5 /spl mu/m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.>

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Experimental evaluation of some rapid single flux quantum cells

Ying Ki Kwong, V. Nandakumar

Some basic cells in the rapid single-flux quantum (RSFQ) family of superconductive logic circuits were studied. An input stage, a buffer, and an OR gate were simulated and laid out for a standard niobium-based fabrication process. The resulting circuits perform properly for clock speeds up to 1 GHz. For the simpler circuits tested, the measured margins are wide, consistent with simulations, and not very dependent on clock speed. However, margin decreases with increased circuit complexity. The input stage converts a rising edge into an SFQ pulse, which has a small amplitude and narrow width in time. On the present circuits, these pulses are about 200 mu V in amplitude and 10 ps in width. To facilitate measurement, the authors have chosen as the output an asymmetrical superconducting quantum interference device (SQUID) consisting of two Josephson junctions. It converts SFQ pulses into 2.5 mV latching output levels on chip. By inductively coupling SFQ pulses into the SQUID loop, DC current isolation between the RSFQ circuit-under-test and the output stage is provided. The SQUID was optimized for 2 GHz operations.>

IEEE Transactions on Applied Superconductivity•Mar 1, 1993•7 citations
An analog to digital converter (ADC) using the rapid single flux quantum (RSFQ) logic family implemented in niobium nitride (NbN) technology is described. The circuit was originally developed and demonstrated in niobium technology. An identical circuit was then laid out, fabricated and demonstrated in NbN technology. The chips were fabricated using an eight-layer NbN-based process with Josephson junction critical current density of 500 A/cm/sup 2/. In this paper, we report on the measurement results for a 6-bit flux quantizing ADC which exhibited proper operation and good DC bias margins. We also demonstrate results from an ADC chip operating up to 9.5 K.>
We report on the fabrication and the operation of all-NbN rapid single flux quantum (RSFQ) circuits. The NbN integrated circuit consists of NbN/AlN/NbN tunnel junctions, Mo resistors, sputtered SiO/sub 2/ insulating layers, and 400-nm-thick NbN ground plane and wiring layer. The circuits were fabricated with the minimum junction size of 2 /spl mu/m/spl times/2 /spl mu/m and the alignment margin of +/-0.5 /spl mu/m. We designed RSFQ logic cells under critical current density of 2.5 kA/cm/sup 2/, sheet resistance of 2 /spl Omega/ and sheet inductance of 1.4 pH. We experimentally investigated dc bias margin of the fabricated RSFQ cells at 9 K. We observed relatively large dc bias margin of more than +/-25% for a pulse splitter, a confluence buffer and an RS flip-flop, while the dc bias margin of a T flip-flop was less than +/-5%. We succeeded to demonstrate the operation of 16-bit concurrent flow shift register at 9 K.
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.
In the future generations of telecommunication satellites, it will be necessary to reduce the analog part in reception systems and achieve RF front-end at higher carrier frequencies with higher sensitivity and higher bandwidth. RSFQ (Rapid Single Flux Quantum) superconducting logic is suitable to process very high speed digital data processing with very low power dissipation and with performances well beyond what should be possible with CMOS technology in the next decades. The RSFQ circuit technology based on superconducting niobium nitride (NbN) presently developed at CEA-G involves NbN/Ta(sub X)N/NbN internally shunted Josephson junctions with high critical current density and high maximum switching frequency close to 1THz, as required by ultra-fast RSFQ electronics. Very low power dissipation and very low noise level of fast NbN RSFQ gates designed and fabricated at CEA-G are presented. The RSFQ circuit for a sampling comparator has been studied operating in a sigma-delta modulator with a 30 GHz sinusoidal input carrier signal and high sampling clock frequency of about 200 GHz. We will present the thermal noise and how it influences the phase fluctuations. Such a nitride technology has been recently demonstrated to be fully compatible with large scale integration on 200 mm diameter silicon wafer at reasonable fabrication cost in a micro-nano-electronic platform at CEA-Leti. The applicability of NbN RSFQ digital functions in the next decade Space Telecoms will finally be possible thanks to the development of reliable, low power consuming, space qualified cryocoolers operating at about 10K. Moreover semiconductor system design and integration techniques can be simply adapted to superconductivity, to fit the rules of any RSFQ library-foundry network, such as "CONNECT" for Japan and "FLUXONICS" for Europe.
We are developing an analog-to-digital converter (ADC) based on rapid single-flux quantum technology for radio-astronomic spectroscopy applications where very wide bandwidth is required and relatively small resolution is sufficient. The ADC consists of periodic-flash comparators, a demultiplexer and output drivers; and is sufficiently simple to be implemented on a single chip using a conventional 2–3 μm Nb trilayer technology. A 2-bit ADC has been designed for operation at 16 GHz of the sampling frequency. All the subsystems of the ADC have been fabricated using standard 1.6 kA cm −2 Nb/AlO x /Nb technology and have been successfully tested.
We describe the design of an oversampling single-flux-counting analog-to-digital converter with the estimated bandwidth of a few tens of MHz, based on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an input analog circuit, high-speed quantizer with an original analog/digital negative feedback loop, decimation (comb) filter, and supporting subsystems including clock distribution circuits, quantization signal conditioner, and output drivers. We have applied a new approach, the 'symmetrizing' negative feedback, to free the quantizer from the intrinsic hysteresis without dynamic range sacrifice. The 16-bit version of the system comprises about 1,500 Josephson junctions and consumes 1.2 mW of DC power, when implemented using Nb-trilayer technology with 1 kA/cm/sup 2/, 3.5 /spl mu/m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.>
Some basic cells in the rapid single-flux quantum (RSFQ) family of superconductive logic circuits were studied. An input stage, a buffer, and an OR gate were simulated and laid out for a standard niobium-based fabrication process. The resulting circuits perform properly for clock speeds up to 1 GHz. For the simpler circuits tested, the measured margins are wide, consistent with simulations, and not very dependent on clock speed. However, margin decreases with increased circuit complexity. The input stage converts a rising edge into an SFQ pulse, which has a small amplitude and narrow width in time. On the present circuits, these pulses are about 200 mu V in amplitude and 10 ps in width. To facilitate measurement, the authors have chosen as the output an asymmetrical superconducting quantum interference device (SQUID) consisting of two Josephson junctions. It converts SFQ pulses into 2.5 mV latching output levels on chip. By inductively coupling SFQ pulses into the SQUID loop, DC current isolation between the RSFQ circuit-under-test and the output stage is provided. The SQUID was optimized for 2 GHz operations.>