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Development of Fast NbN RSFQ Logic Gates in Sigma-Delta Converters for Space Telecommunications

Emanuele Baggaetta, M. Maignan, Jean-Claude Villégier

Published Jul 13, 2005• 0 citations
OpenAlex

Abstract

In the future generations of telecommunication satellites, it will be necessary to reduce the analog part in reception systems and achieve RF front-end at higher carrier frequencies with higher sensitivity and higher bandwidth. RSFQ (Rapid Single Flux Quantum) superconducting logic is suitable to process very high speed digital data processing with very low power dissipation and with performances well beyond what should be possible with CMOS technology in the next decades. The RSFQ circuit technology based on superconducting niobium nitride (NbN) presently developed at CEA-G involves NbN/Ta(sub X)N/NbN internally shunted Josephson junctions with high critical current density and high maximum switching frequency close to 1THz, as required by ultra-fast RSFQ electronics. Very low power dissipation and very low noise level of fast NbN RSFQ gates designed and fabricated at CEA-G are presented. The RSFQ circuit for a sampling comparator has been studied operating in a sigma-delta modulator with a 30 GHz sinusoidal input carrier signal and high sampling clock frequency of about 200 GHz. We will present the thermal noise and how it influences the phase fluctuations. Such a nitride technology has been recently demonstrated to be fully compatible with large scale integration on 200 mm diameter silicon wafer at reasonable fabrication cost in a micro-nano-electronic platform at CEA-Leti. The applicability of NbN RSFQ digital functions in the next decade Space Telecoms will finally be possible thanks to the development of reliable, low power consuming, space qualified cryocoolers operating at about 10K. Moreover semiconductor system design and integration techniques can be simply adapted to superconductivity, to fit the rules of any RSFQ library-foundry network, such as "CONNECT" for Japan and "FLUXONICS" for Europe.

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AbstractSuperconducting digital technology based on Rapid Single Flux Quantum (RSFQ) logic offers a 50 times faster clock rate and 100 times less on chip power consumption than today's mainstream semiconductor electronics. This technology is attractive for many applications and in particular for Digital Signal Processing (DSP). The applications of the RSFQ DSPs are numerous and include multi-user detection in spread spectrum system, channel equalization for Multi-in, Multi-out (MIMO) systems, and blind detection and signal tracking for signal intelligence.At Chalmers we are developing a hybrid DSP with target performance of 30 giga operations per second. It consists of an RSFQ Multiply Accumulate unit (MAC), RSFQ fast cache memory, and an external semiconductor memory. The development of the complex high speed cryogenic digital system requires interface, packaging and testing solutions. The main difficulties are due to the 4 K operational temperature, the high magnetic field sensitivity of the RSFQ circuits, the multi-channel high bandwidth interface required in the hybrid architecture, and the high speed RSFQ digital core. The key steps towards addressing each of these problems are the subject of this thesis. The main emphasis is put on the experimental testing and interfacing of superconductor electronics. A large part of the work is connected to the experimental verification of DSP components and their incremental improvement towards functionality. The RSFQ circuits tested were fabricated using the four-metal layer VLSI processes available from NGST(8 kA/cm^2 Josephson junction critical current) and HYPRES (both 1 kA/cm^2 and HYPRES 4.5 kA/cm^2. The main results of the work are demonstrations of the RSFQ cache memory with more than 2,000 Josephson junctions, 33.5 GHz operation of the digital clock controller, and 20.48 GHz operation of the autocorrelator. In addition, various experiments have been done for investigation of parasitic effects in RSFQ circuits such as flux trapping and influence of the high current bias lines.At the final stage of the work, a unique high bandwidth 4 K cryocooler based experimental setup has been developed. The system, developed in close cooperation with Hypres Inc. USA, has 40 high speed I/Os with bandwidth of 2 Gbps, 64 DC bias channels, 4 high frequency clock lines, and 4 auxiliary control lines. It supports exchangeable test units for 10 mm x 10 mm and 20 mm x 20 mm Multi Chip Module (MCM) carriers. The availability of such a system is critical to demonstration of the hybrid DSP prototype and future commercialization.

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A niobium nitride-based analog to digital converter using rapid single flux quantum logic operating at 9.5 K

Masoud Radparvar

An analog to digital converter (ADC) using the rapid single flux quantum (RSFQ) logic family implemented in niobium nitride (NbN) technology is described. The circuit was originally developed and demonstrated in niobium technology. An identical circuit was then laid out, fabricated and demonstrated in NbN technology. The chips were fabricated using an eight-layer NbN-based process with Josephson junction critical current density of 500 A/cm/sup 2/. In this paper, we report on the measurement results for a 6-bit flux quantizing ADC which exhibited proper operation and good DC bias margins. We also demonstrate results from an ADC chip operating up to 9.5 K.>

IEEE Transactions on Applied Superconductivity•Jun 1, 1994•14 citations
In the future generations of telecommunication satellites, it will be necessary to reduce the analog part in reception systems and achieve RF front-end at higher carrier frequencies with higher sensitivity and higher bandwidth. RSFQ (Rapid Single Flux Quantum) superconducting logic is suitable to process very high speed digital data processing with very low power dissipation and with performances well beyond what should be possible with CMOS technology in the next decades. The RSFQ circuit technology based on superconducting niobium nitride (NbN) presently developed at CEA-G involves NbN/Ta(sub X)N/NbN internally shunted Josephson junctions with high critical current density and high maximum switching frequency close to 1THz, as required by ultra-fast RSFQ electronics. Very low power dissipation and very low noise level of fast NbN RSFQ gates designed and fabricated at CEA-G are presented. The RSFQ circuit for a sampling comparator has been studied operating in a sigma-delta modulator with a 30 GHz sinusoidal input carrier signal and high sampling clock frequency of about 200 GHz. We will present the thermal noise and how it influences the phase fluctuations. Such a nitride technology has been recently demonstrated to be fully compatible with large scale integration on 200 mm diameter silicon wafer at reasonable fabrication cost in a micro-nano-electronic platform at CEA-Leti. The applicability of NbN RSFQ digital functions in the next decade Space Telecoms will finally be possible thanks to the development of reliable, low power consuming, space qualified cryocoolers operating at about 10K. Moreover semiconductor system design and integration techniques can be simply adapted to superconductivity, to fit the rules of any RSFQ library-foundry network, such as "CONNECT" for Japan and "FLUXONICS" for Europe.
The article describes the activities aimed at bringing superconductive high-speed electronics towards maturity.Integrated circuits based on the effects in superconducting materials have become feasible for some years already.The main focus lies on the so-called Rapid Single-Flux-Quantum (RSFQ) electronics which allows the combination of high operation frequencies (well above 20 GHz) with very low energy consumption when logical states are changed.Thus, this circuit technology exhibits a promising potential for realising energy-efficient modules for signal processing and computing.Recently, a dedicated design infrastructure has been developed in Europe.Closely associated is a foundry for digital RSFQ integrated circuits so that the fabrication of integrated circuits is viable.In the contribution, the basic features of the RSFQ circuit design are addressed with special emphasis on implementation on the wafer scale.
The Rapid Single-Flux-Quantum logic (RSFQ) presents an efficient way to achieve ultra fast digital operations. This logic uses the macroscopic effects which can be found in nano-structured superconductor devices such as the Josephson AC and DC effects, and the magnetic flux quantization. As the typical time of the Josephson junction quantized phase leap 2π is in the order of picoseconds, the RSFQ circuits can operate with clock frequencies in the order of hundreds of GHz. This invited paper focuses on basic principles of superconducting RSFQ logic as well as on typical applications, such as the signal conversion or petaflops computing systems. In addition we point out the benefits of the semi-metallic NbN-TaxN-NbN Josephson junction technology, which has been developed at CEA-INAC in Grenoble.
We have designed a band-pass sigma-delta modulator made in niobium nitride technology. The basic components of such a 10 GHz carrier frequency modulator are a band filtering resonator and an SFQ comparator synchronized with a clock frequency up to 200 GHz sampling rate. We describe the clock design including an internal JTL and its testing circuit based on frequency division. The technology involves NbN/Ta/sub x/N/NbN internally shunted Josephson junctions with Jc/spl sim/20kA/cm/sup 2/ and high RnIc product (/spl sim/1 mV) at 4.2 K. Junction parameters are shown to be controlled by the reactive sputtering conditions of the Ta/sub x/N barrier. SiO/sub 2//MgO bi-layers are used as dielectrics associated with NbN wiring layers and ground-plane. All layers are prepared in a way compatible with a full processing at about 350/spl deg/C in order to minimize the London penetration depth of NbN layers and thus to allow circuits operation at about 9 K. High frequency simulations of the modulator's circuits are presented, including the comparator, the DEMUX, and the resonator response.
The authors argue that superconducting digital electronics is the future trend for high-speed and low-power applications. Low-T/sub c/ technology based on stable Nb-AlO/sub x/-Nb tunneling junctions has been successful in constructing most of the digital circuit logic elements. A four-stage shift register constructed with latching logic operated up to 4 GHz with a power consumption of about 60 mu W per gate. A 12-b analog-digital coverter constructed with a single flux quantum (SFQ) logic showed proper operation with the total power dissipated being only about 100 mu W. Fabrication of Josephson tunneling junctions with high-T/sub c/ materials has been tougher than with low-T/sub c/ materials. However, recently developed very high speed rapid single flux quantum (RSFQ) logic circuits can be applied to weak link type junctions fabricated with YBa/sub 2/Cu/sub 3/O/sub 7-x/ films. Simulations of the various circuits with weak link type junctions, e.g., shift registers, analog-digital converters, etc., show fast operation and reasonable margins. Applications of similar concepts can be applied to NbN circuits operating at above 10 K.>
AbstractSuperconducting digital technology based on Rapid Single Flux Quantum (RSFQ) logic offers a 50 times faster clock rate and 100 times less on chip power consumption than today's mainstream semiconductor electronics. This technology is attractive for many applications and in particular for Digital Signal Processing (DSP). The applications of the RSFQ DSPs are numerous and include multi-user detection in spread spectrum system, channel equalization for Multi-in, Multi-out (MIMO) systems, and blind detection and signal tracking for signal intelligence.At Chalmers we are developing a hybrid DSP with target performance of 30 giga operations per second. It consists of an RSFQ Multiply Accumulate unit (MAC), RSFQ fast cache memory, and an external semiconductor memory. The development of the complex high speed cryogenic digital system requires interface, packaging and testing solutions. The main difficulties are due to the 4 K operational temperature, the high magnetic field sensitivity of the RSFQ circuits, the multi-channel high bandwidth interface required in the hybrid architecture, and the high speed RSFQ digital core. The key steps towards addressing each of these problems are the subject of this thesis. The main emphasis is put on the experimental testing and interfacing of superconductor electronics. A large part of the work is connected to the experimental verification of DSP components and their incremental improvement towards functionality. The RSFQ circuits tested were fabricated using the four-metal layer VLSI processes available from NGST(8 kA/cm^2 Josephson junction critical current) and HYPRES (both 1 kA/cm^2 and HYPRES 4.5 kA/cm^2. The main results of the work are demonstrations of the RSFQ cache memory with more than 2,000 Josephson junctions, 33.5 GHz operation of the digital clock controller, and 20.48 GHz operation of the autocorrelator. In addition, various experiments have been done for investigation of parasitic effects in RSFQ circuits such as flux trapping and influence of the high current bias lines.At the final stage of the work, a unique high bandwidth 4 K cryocooler based experimental setup has been developed. The system, developed in close cooperation with Hypres Inc. USA, has 40 high speed I/Os with bandwidth of 2 Gbps, 64 DC bias channels, 4 high frequency clock lines, and 4 auxiliary control lines. It supports exchangeable test units for 10 mm x 10 mm and 20 mm x 20 mm Multi Chip Module (MCM) carriers. The availability of such a system is critical to demonstration of the hybrid DSP prototype and future commercialization.
An analog to digital converter (ADC) using the rapid single flux quantum (RSFQ) logic family implemented in niobium nitride (NbN) technology is described. The circuit was originally developed and demonstrated in niobium technology. An identical circuit was then laid out, fabricated and demonstrated in NbN technology. The chips were fabricated using an eight-layer NbN-based process with Josephson junction critical current density of 500 A/cm/sup 2/. In this paper, we report on the measurement results for a 6-bit flux quantizing ADC which exhibited proper operation and good DC bias margins. We also demonstrate results from an ADC chip operating up to 9.5 K.>