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Applied Physics Letters

A simple high-performance current-switched Josephson gate

T. A. Fulton, S. S. Pei, L. N. Dunkleberger

Published May 15, 1979• 48 citations
Publisher

Abstract

A versatile current-switched gate is described which consists of two Josephson tunnel junctions and a small resistor in a loop. The directly combined bias and control currents flow through one junction in the zero-voltage state, causing the switching. The second junction and the resistor provide isolation between input and output after switching. The switching speed of a few tens of picoseconds and the microwatt power dissipation are comparable to those of other present designs. The design is particularly simple, compact, and easy to fabricate.

DOI
10.1063/1.90614

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A versatile current-switched gate is described which consists of two Josephson tunnel junctions and a small resistor in a loop. The directly combined bias and control currents flow through one junction in the zero-voltage state, causing the switching. The second junction and the resistor provide isolation between input and output after switching. The switching speed of a few tens of picoseconds and the microwatt power dissipation are comparable to those of other present designs. The design is particularly simple, compact, and easy to fabricate.
We describe a one-bit full adder circuit constructed from direct-coupled Josephson logic elements. The basic gate, which can perform various logic functions, consists of two Josephson junctions and two resistors connected in a loop. Switching the junctions into the finite-voltage state diverts the bias current into a parallel output line, which is directly coupled through the junctions of successive logic elements. The adder is constructed with a 100 μm basic linewidth and 25 μm square tin tunnel junctions. It operates under all input data conditions with an add time of about 1 nS and a power dissipation of 1 μW per gate.
Flux quantum logic and memory circuits using superconducting Josephson tunnel junctions have high-speed switching times (approximately 1 ps), low power dissipation (< 1 (mu) W per circuit) and low levels of thermally induced electrical noise. Current designs of such circuits employ single trilayer junctions, which impose circuit size and logic threshold limitations. A new design component, the multilayered tunnel junction, consists of a vertically stacked array (a 1D superlattice) of Josephson tunnel junctions. The introduction of multilayered junctions into superconducting electronic circuitry offers a reduction in the current device size, fault tolerances, and new device applications. We present numerical simulations of simple circuits employing multilayered Josephson junctions as design components. Comparison with conventional single flux quantum circuitry is discussed. We also present preliminary measurements of multilayered Josephson junctions fabricated for use in flux quantum devices.
The gate delay of a single CIL AND gate is measured with a Josephson sampler. The CIL gate consists of a CIL interferometer preceded by a three-junction SQUID isolation stage. The smallest delay observed was 6 ps. Simulation results and sampling measurements of a gate designed to switch to 3Vgare also reported. Processing variations precluded successful operation of the higher-voltage gate. The simulations suggest that this failure is due to the large difference of the average critical current from the design value. Scaling arguments show that for small-scale circuits high-speed operation with gate delays of a few picoseconds can be achieved with junction dimensions approximately equal to the Josephson penetration depth.
A new type of single flux quantum logic gate is proposed, which can perform unilateral propagation of signal without using three-phase clock. This gate is designed to be built with bridge-type Josephson junctions. A basic logic gate consists of two one-junction interferometers coupled by superconducting interconnecting lines, and the logical states are represented by zero or one quantized fluxoid in one of one-junction interferometers. The bias current of the unequal magnitude to each of the two one-junction interferometers results in unilateral signal flow. By adjusting design parameters such as the ratio of the critical current of Josephson junctions and the inductances, circuits with the noise immunity of greater than 50% with respect to the bias current have been designed. Three cascaded gates were modeled and simulated on a computer, and the unilateral signal flow was confirmed. The simulation also shows that a switching delay about 2 picoseconds is feasible.