Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Superconductor Science and Technology

Optimal signal propagation speed of a Josephson transmission line

Boyko Dimov, Valery Todorov, Valeri Mladenov, Friedrich Uhlmann

Published Apr 29, 2004• 5 citations
Publisher

Abstract

We study the dependence between the JTL inductance and its SFQ pulse propagation speed. An optimal value, being far away from the generally established design rules, is found. The dependence of this optimal value on the JTL parasitics is also considered. The bias margins behaviour around the new optimum is presented.
DOI
10.1088/0953-2048/17/6/015

Related papers

Interconnect Routing for Large-Scale RSFQ Circuits

Tahereh Jabbari, Gleb Krylov, Stephen R. Whiteley +3 more

The increasing complexity of modern rapid single flux quantum (RSFQ) circuits has made on-chip signal routing, an issue of growing importance. In this paper, several methods for routing large-scale RSFQ circuits are described, and a process is presented for determining when to use passive microstrip transmission lines (PTL) and active Josephson transmission lines (JTL). The effect of the size of the JTL inductor and Josephson junctions on the length of a JTL chain for a target delay is also discussed. The dependence of the JTL inductance on the physical layout is evaluated, and the effects of the primary PTL parameters on delay are characterized. A novel PTL driver and receiver configuration is also proposed. Tradeoffs among the number of JJs, inductance, and length of a PTL stripline in the receiver and driver circuits are reported. The energy dissipation is evaluated for two different interconnects. A tradeoff between the proposed PTL circuits and an optimized JTL in terms of energy dissipation and delay is discussed. Guidelines for choosing the optimal element values are determined, and a simulated bias margin of ±29% for the bias current of the proposed receiver operating at 20 GHz in a 10 kA/cm2technology for a 1-mm transmission line is achieved. Summarizing, guidelines and design tradeoffs appropriate for automated layout and synthesis are provided for driving long interconnect in SFQ VLSI circuits.

IEEE Transactions on Applied Superconductivity•Mar 4, 2019•86 citations

Oscillation of SFQ pulse in oxide JTL

Y. Tarutani, H. Sugiyama, K. Tanabe

Characteristics of SFQ signal propagation in oxide circuits were investigated by numerical simulation. The numerical simulation for the SFQ signal propagating in the Josephson transmission line (JTL) was performed by assuming the inductor to be a passive transmission line and by taking into account the high I/sub c/R/sub n/ value of oxide junctions. The SFQ signal was found to oscillate when the inductor length was more than 20 /spl mu/m. The origin of the oscillation and the oscillation conditions were investigated with respect to the Josephson plasma frequency. A shunt resistor connected between an inductor and the groundplane was found to be effective for suppressing the oscillation. The JTL in which shunt resistors are connected may also be used as a delay line.

IEEE Transactions on Applied Superconductivity•Jun 1, 2003•1 citation

Improved techniques for long-distance signal propag on within the rapid single-flux quantum digital circuits

Boyko Dimov, Valery Todorov, Valeri Mladenov +1 more

An important precondition for the successful realization of any high-speed complex electronic device are the efficient (in terms of speed and signal degradation) long-distance interconnects. The two techniques for long-distance on-chip signal propagation, used by the modern rapid single flux quantum (RSFQ) designers - via Josephson transmission lines (JTLs) and via passive transmission lines (PTLs) - are investigated here. Novel design techniques are presented, which significantly improve the JTLs and PTLs performance as long-distance SFQ pulse transmitters within the digital RSFQ circuits.

International Symposium on Signals, Circuits and Systems•Oct 4, 2006•2 citations

An improved technique for the design of Josephson transmission lines

Boyko Dimov, Valery Todorov, Valeri Mladenov +6 more

Recently, we have proposed a novel technique for the design of Josephson transmission lines (JTLs). According to our theoretical estimations, this technique is able to increase the propagation speed of the JTLs and to reduce drastically their dc bias consumption. Here, a successful experimental verification of these estimations is presented.

Superconductor Science and Technology•Feb 27, 2006•2 citations

Optimization of SFQ Logic Gate Considering Dependence of its Signal Propagation Delay on the Bias Voltage

Mikio Otsubo, Yuki Yamanashi, Nobuyuki Yoshikawa

Superconductive single flux quantum (SFQ) digital circuits can operate at a clock frequency of several tens of gigahertz. The operating margin of an SFQ logic circuit generally decreases with an increase in the operating frequency because of the timing error in the low-bias region caused by the difference in bias dependence of the signal-propagation delay between the data and clock lines. We proposed an improvement in the operating margin by controlling the dependence of the signal-propagation time on the bias voltage. In the present study, we investigated a new optimization method for an SFQ logic gate. We developed a new circuit parameter optimizer, which takes into account not only the bias margin but also the dependence of the signal-propagation delay on the bias voltage. We defined an appropriate evaluation function for the optimization. From the result of the optimization using the defined evaluation function, we designed and demonstrated an SFQ AND gate optimized using the new optimizer.

Physics Procedia•Jan 1, 2014•0 citations

Improvement of Operating Margin of SFQ Circuits by Controlling Dependence of Signal Propagation Time on Bias Voltage

Mikio Otsubo, Yuki Yamanashi, Nobuyuki Yoshikawa

Superconductive single flux quantum (SFQ) digital circuits can operate at a clock frequency of several tens of gigahertz. However, the operating margin of these circuits decreases with an increase in the operating frequency because a timing error occurs in the low bias region. In this study, a novel design method that enables a wide operating margin at a high operating frequency has been investigated. The proposed circuits incorporate an additional bias feeding line in addition to the conventional bias feeding lines of the conventional Josephson transmission lines (JTLs) and can control the dependence of signal propagation time on the bias voltage. We have shown experimentally that in our proposed JTLs, the signal propagation time becomes more sensitive to the bias voltage. Timing errors can be avoided by inserting proposed JTL cells in the critical data path of the SFQ digital circuits. Circuit simulation results indicate that the operating margin of a bit-serial SFQ full adder, designed assuming the 2.5 kA/cm2Nb process, can be improved by 15% compared with the conventional design at a frequency of 20 GHz by employing our novel design method.

IEEE Transactions on Applied Superconductivity•Dec 13, 2012•5 citations
The increasing complexity of modern rapid single flux quantum (RSFQ) circuits has made on-chip signal routing, an issue of growing importance. In this paper, several methods for routing large-scale RSFQ circuits are described, and a process is presented for determining when to use passive microstrip transmission lines (PTL) and active Josephson transmission lines (JTL). The effect of the size of the JTL inductor and Josephson junctions on the length of a JTL chain for a target delay is also discussed. The dependence of the JTL inductance on the physical layout is evaluated, and the effects of the primary PTL parameters on delay are characterized. A novel PTL driver and receiver configuration is also proposed. Tradeoffs among the number of JJs, inductance, and length of a PTL stripline in the receiver and driver circuits are reported. The energy dissipation is evaluated for two different interconnects. A tradeoff between the proposed PTL circuits and an optimized JTL in terms of energy dissipation and delay is discussed. Guidelines for choosing the optimal element values are determined, and a simulated bias margin of ±29% for the bias current of the proposed receiver operating at 20 GHz in a 10 kA/cm2technology for a 1-mm transmission line is achieved. Summarizing, guidelines and design tradeoffs appropriate for automated layout and synthesis are provided for driving long interconnect in SFQ VLSI circuits.
Characteristics of SFQ signal propagation in oxide circuits were investigated by numerical simulation. The numerical simulation for the SFQ signal propagating in the Josephson transmission line (JTL) was performed by assuming the inductor to be a passive transmission line and by taking into account the high I/sub c/R/sub n/ value of oxide junctions. The SFQ signal was found to oscillate when the inductor length was more than 20 /spl mu/m. The origin of the oscillation and the oscillation conditions were investigated with respect to the Josephson plasma frequency. A shunt resistor connected between an inductor and the groundplane was found to be effective for suppressing the oscillation. The JTL in which shunt resistors are connected may also be used as a delay line.
An important precondition for the successful realization of any high-speed complex electronic device are the efficient (in terms of speed and signal degradation) long-distance interconnects. The two techniques for long-distance on-chip signal propagation, used by the modern rapid single flux quantum (RSFQ) designers - via Josephson transmission lines (JTLs) and via passive transmission lines (PTLs) - are investigated here. Novel design techniques are presented, which significantly improve the JTLs and PTLs performance as long-distance SFQ pulse transmitters within the digital RSFQ circuits.
Superconductive single flux quantum (SFQ) digital circuits can operate at a clock frequency of several tens of gigahertz. The operating margin of an SFQ logic circuit generally decreases with an increase in the operating frequency because of the timing error in the low-bias region caused by the difference in bias dependence of the signal-propagation delay between the data and clock lines. We proposed an improvement in the operating margin by controlling the dependence of the signal-propagation time on the bias voltage. In the present study, we investigated a new optimization method for an SFQ logic gate. We developed a new circuit parameter optimizer, which takes into account not only the bias margin but also the dependence of the signal-propagation delay on the bias voltage. We defined an appropriate evaluation function for the optimization. From the result of the optimization using the defined evaluation function, we designed and demonstrated an SFQ AND gate optimized using the new optimizer.
Superconductive single flux quantum (SFQ) digital circuits can operate at a clock frequency of several tens of gigahertz. However, the operating margin of these circuits decreases with an increase in the operating frequency because a timing error occurs in the low bias region. In this study, a novel design method that enables a wide operating margin at a high operating frequency has been investigated. The proposed circuits incorporate an additional bias feeding line in addition to the conventional bias feeding lines of the conventional Josephson transmission lines (JTLs) and can control the dependence of signal propagation time on the bias voltage. We have shown experimentally that in our proposed JTLs, the signal propagation time becomes more sensitive to the bias voltage. Timing errors can be avoided by inserting proposed JTL cells in the critical data path of the SFQ digital circuits. Circuit simulation results indicate that the operating margin of a bit-serial SFQ full adder, designed assuming the 2.5 kA/cm2Nb process, can be improved by 15% compared with the conventional design at a frequency of 20 GHz by employing our novel design method.