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Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Technologies For A Superconducting Sampling Oscilloscope/Time Domain Reflectometer

Stephen R. Whiteley, Eric Hanson, Gert K. G. Hohenwarter, F. Kuo, S. M. Faris

Published Sep 8, 1988• 10 citations
Publisher

Abstract

HYPRES, Inc. has introduced to the commercial marketplace a Sampling Oscilloscope/Time Domain Reflectometer (TDR) based on Josephson junction technology. The unit offers measurement performance commensurate with the inherent high speed of the Josephson elements, e.g., bandwidths in excess of 70 GHz and rise times on the order of 5 ps. A Josephson {rigger recognizer and delay circuit allows triggering of the sampling oscilloscope from the signal itself, with full view of the trigger point. Input modules offering different sensitivities or TDR capability are quickly interchangeable, and operating temperature is achieved in less than one minute. The technical details of the cooling technique and the chip circuitry will be described in this paper .

DOI
10.1117/12.947459

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HYPRES, Inc. has introduced to the commercial marketplace a Sampling Oscilloscope/Time Domain Reflectometer (TDR) based on Josephson junction technology. The unit offers measurement performance commensurate with the inherent high speed of the Josephson elements, e.g., bandwidths in excess of 70 GHz and rise times on the order of 5 ps. A Josephson {rigger recognizer and delay circuit allows triggering of the sampling oscilloscope from the signal itself, with full view of the trigger point. Input modules offering different sensitivities or TDR capability are quickly interchangeable, and operating temperature is achieved in less than one minute. The technical details of the cooling technique and the chip circuitry will be described in this paper .
HYPRES, Inc. has introduced a Sampling Oscilloscope/Time Domain Reflectometer (TDR) based on Josephson junction technology to the commercial marketplace. The unit offers measurement performance commensurate with the inherent high speed of the Josephson elements, e.g., risetimes on the order of 8 ps. The Josephson circuitry is contained on a single 1.1 × 1.6 fused silica substrate and housed in an interchangeable measurement module. Only the portion of the chip which contains the superconducting circuitry is cooled with a coplanar transmission line providing the wide bandwidth interface between the room temperature and cryogenic environments less than 1cm apart.
The promises of the ultrahigh-performance properties of superconductivity and Josephson junction technologies have been known for quite some time. This presentation describes the first superconducting electronics and measurement system and its important role as a major tool to advance microwave and millimeter wave technologies. This breakthrough tool is a sampling oscilloscope with 5-ps rise time, 50-μV sensitivity, and a time domain reflectometer with 8-ps rise time. In order to achieve these performance goals, several technological hurdles had to be overcome including perfecting a manufacturing process for building Josephson junction IC chips, developing an innovative cooling technique, developing interfaces and interconnections with bandwidths in excess of 70 GHz, and developing the room-temperature hardware and software necessary to make the instruments convenient, easy to use, easy to learn, in addition to making available functions and features users have come to expect from sophisticated digital test instrumentation. These technological developments are stepping stones leading to the realization of more sophisticated and complex electronic systems satisfying the needs of scientists, technologists, and engineers. The unprecedented speed and sensitivity make it possible to attack new frontiers.
Measurement of signals generated by superconducting Josephson junction (JJ) circuits require ultra-fast components located in close proximity to the generating circuitry. We report a detailed study of optimal design criteria for a JJ-based sampler that balances the highest sampler bandwidth (shortest 10%-90% rise time) with minimal sampled waveform distortion. We explore the impacts on the performance of a sampler, realized using a single underdamped JJ as the logical sampling element (the comparator), due to the type of signal-comparator coupling scheme that is utilized (galvanic, inductive, or capacitive). In these simulations, we emulate the entire waveform reconstruction sampling process, via comparator threshold detection, while sweeping the time location at which the waveform is being sampled. We extract the sampled waveform rise time [or full width at half maximum (FWHM)] as a function of the comparator's Stewart-McCumber parameter and as a function of the coupling strength between the device under test and comparator. Based on our simulation results, we design, fabricate, and characterize a cryocooled (3.6 K operating temperature) JJ sampler utilizing the NIST state-of-the-art Nb/amorphous-Si/Nb junctions. We separately sample a step signal and an impulse generator co-located on-chip with the comparator and sampling strobe generator by implementing the same binary search comparator threshold detection technique during sampler operation as is used in simulation. With this technique, the system is fully digital and automated, and the operation of the fabricated device directly mirrors simulation. Our sampler technology shows a 10%-90% rise time of 3.3 ps and the capability to measure transient pulse widths of 2.5 ps FWHM. A linear system analysis of sampled waveforms indicates a 3 dB bandwidth of 225 GHz, but we demonstrate effective measurement of signals well above this-as high as 600 GHz.
Measurement of signals generated by superconducting Josephson junction (JJ) circuits require ultra-fast components located in close proximity to the generating circuitry. We report a detailed study of optimal design criteria for a JJ-based sampler which balances the highest sampler bandwidth (shortest 10\%--90\% rise time) with minimal sampled waveform distortion. We explore the impacts on performance of a sampler, realized using a single underdamped JJ as the logical sampling element (the comparator), due to the type of signal-comparator coupling scheme that is utilized (galvanic, inductive, or capacitive). In these simulations we emulate the entire waveform reconstruction sampling process, via comparator threshold detection, while sweeping the time location at which the waveform is being sampled. We extract the sampled waveform rise time (or FWHM) as a function of the comparator's Stewart-McCumber parameter and as a function of the coupling strength between the device under test and comparator. Based on our simulation results we design, fabricate, and characterize a cryocooled (3.6 K operating temperature) JJ sampler utilizing the NIST state-of-the-art Nb/amorphous-Si/Nb junctions. We separately sample a step signal and impulse generator co-located on-chip with the comparator and sampling strobe generator by implementing the same binary search comparator threshold detection technique during sampler operation as is used in simulation. With this technique the system is fully-digital and automated and operation of the fabricated device directly mirrors simulation. Our sampler technology shows a 10\%--90\% rise time of 3.3 ps and the capability to measure transient pulse widths of 2.5 ps FWHM. A linear systems analysis of sampled waveforms indicate a 3 dB bandwidth of 225 GHz, but we demonstrate effective measurement of signals well above this -- as high as 600 GHz.