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Superconductor Science and Technology

Design and fabrication of 10 V SINIS Josephson arrays for programmable voltage standards

H. Schulze, Ralf Behr, J. Kohlmann, F Müller, J. Niemeyer

Published Aug 2, 2000• 67 citations
Publisher

Abstract

The fabrication and the chip layout of 69120 SINIS Josephson junction series arrays for a programmable 10 V Josephson dc voltage standard are presented. Under 70 GHz microwave irradiation, the current-voltage characteristic exhibits a non-hysteretic voltage step with a step width of 200 µA. The chip can be operated with the conventional SIS Josephson voltage standard systems.

DOI
10.1088/0953-2048/13/9/301

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The fabrication and the chip layout of 69120 SINIS Josephson junction series arrays for a programmable 10 V Josephson dc voltage standard are presented. Under 70 GHz microwave irradiation, the current-voltage characteristic exhibits a non-hysteretic voltage step with a step width of 200 µA. The chip can be operated with the conventional SIS Josephson voltage standard systems.
A programmable dc voltage standard for output voltages of up to 10 V has been realized. The series arrays, consisting of about 69120 overdamped superconductor/insulator/normal metal/insulator/superconductor (SINIS) Josephson junctions, have been fabricated using the reliable Nb-Al/Al/sub 2/O/sub 3/ technology. The arrays can be operated in conventional Josephson voltage standards at microwave frequencies from 70 GHz to 75 GHz. Steps of constant voltage are observed at very low microwave power levels, since the major part of the microwave power is generated by the junctions themselves. The operation of the arrays and the formation of Shapiro steps are discussed.
Recent metrological activities with programmable Josephson voltage standards (PJVS) are focused on extending the quantum accuracy to AC voltages, e.g. for the step-wise approximation of sine waves. Stimulated by the progress in this field, new requirements for the quality and availability of 1 V and 10 V circuits have been established. Based on the experience with programmable 1 V SINIS circuits fabricated at PTB and used at present by 13 National Metrological Institutes worldwide, the fabrication process and the microwave design were improved. The experience gained hereby enabled us to improve the properties of programmable 10 V SINIS arrays which were realized by us for the first time in 2000. The new 10 V circuits have 17 bit resolution and develop under 70 GHz microwave irradiation flat Shapiro steps at the 10 V level which are more than 600 muA wide. A direct comparison of the output voltage with a conventional 10 V SIS Josephson voltage standard confirmed the suitability for metrological applications. Incorporating 10 V-PJVS into existing AC metrology setups is expected to reduce their uncertainty budgets by about one order of magnitude.
Programmable Josephson voltage standards (PJVSs) in combination with fast switchable DC current sources have opened up new applications in the field of low-frequency AC metrology. The growing interest in output voltages of up to plusmn10 V initiated efforts by several National Metrological Institutes to realize 10 V PJVSs. Presently, only 10 V PJVSs from PTB based on SINIS junctions have been successfully incorporated into existing setups for AC metrology. However, the fabrication of 10 V SINIS arrays that are driven at 70 GHz suffers from very low yield. The recent technological progress made at NIST enabled the drop-in replacement of the low-yield SINIS arrays by more robust SNS arrays. The N-material is an amorphous NbxSi1-xalloy near the metal-insulator transition and is deposited by co-sputtering. For the first time, fully operational 1 V and 10 V PJVSs with SNS junctions that are suitable for a 70 GHz drive have been fabricated and tested. This work was done in close cooperation between NIST and PTB.
A 10 V programmable Josephson voltage standard (PJVS) circuit with a maximum output voltage of 20 V and a microwave bias of 18.5 GHz was designed and fabricated. Although an attempt was made to improve the fabrication yield for the 10 V PJVS circuit, it was not sufficiently large to reproducibly fabricate a perfect chip without any defects. The redundant arrays were additionally integrated to increase the maximum output voltage, which contributed to an increase in the number of available chips under the limited fabrication yield. Fortunately, most of the defective arrays had a zeroth Shapiro step, while the first step was very small or zero. If the array was not dc biased, it did not generate any voltage, because it worked as a superconductive wiring. In this case, the maximum output voltage became smaller than that of a perfect chip, but it functioned as a 10 V PJVS, due to the back-up arrays.