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IEEE Transactions on Magnetics

Low-loss lumped-element capacitors for superconductive integrated circuits

Manjul Bhushan, J.B. Green, Alfredo C. Anderson

Published Mar 1, 1989• 2 citations
Publisher

Abstract

Low-loss lumped-element capacitors for superconductive circuits were fabricated using sputter-deposited Nb electrodes. The dielectric layer was formed by partially anodizing the Nb base electrode. The deposition technique for the counterelectrode strongly affected the parasitic shunt conductance of the capacitors. It was found that this conductance could be reduced by depositing the Nb counterelectrode films by DC magnetron sputtering at a low rate and at a high Ar pressure. By optimizing these process parameters, capacitors with breakdown voltages greater than 85% of the anodic oxide formation voltage and loss tangents less than 0.003 at 10 MHz were fabricated. These capacitors were integrated with Nb thin-film inductors to produce L-C resonators with quality factors greater than 400.>

DOI
10.1109/20.92491

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Low-loss lumped-element capacitors for superconductive circuits were fabricated using sputter-deposited Nb electrodes. The dielectric layer was formed by partially anodizing the Nb base electrode. The deposition technique for the counterelectrode strongly affected the parasitic shunt conductance of the capacitors. It was found that this conductance could be reduced by depositing the Nb counterelectrode films by DC magnetron sputtering at a low rate and at a high Ar pressure. By optimizing these process parameters, capacitors with breakdown voltages greater than 85% of the anodic oxide formation voltage and loss tangents less than 0.003 at 10 MHz were fabricated. These capacitors were integrated with Nb thin-film inductors to produce L-C resonators with quality factors greater than 400.>
We have characterized the microwave loss of high-Q parallel plate capacitors fabricated from thin-film Al/Al2O3/Re heterostructures on (0001) Al2O3 substrates. The superconductor-insulator-superconductor trilayers were grown in situ in a hybrid deposition system: the epitaxial Re base and polycrystalline Al counterelectrode layers were grown by sputtering, while the epitaxial Al2O3 layer was grown by pulsed laser deposition. Structural analysis indicates a highly crystalline epitaxial Al2O3 layer and sharp interfaces. The measured intrinsic (low-power, low-temperature) quality factor of the resonators is as high as 3 × 104. These results indicate that low-loss grown Al2O3 is an attractive candidate dielectric for high-fidelity superconducting qubit circuits.
Amorphous hydrogenated silicon (a-Si:H) based lumped elements are one of the promising ways for large-scale integration of superconducting quantum devices. We present a detailed study devoted to the plasma-enhanced chemical vapor deposition process parameters' influence on the structure and morphology of a-Si:H dielectric thin films. We experimentally demonstrate a microcrystalline-to-amorphous growth transition by changing the H2/SiH4 ratio and establish a relationship between the film's structure, thickness, and dielectric loss tangent (tan δ). It is shown that the best dielectric loss tangents of tan δLP = 4.5 × 10−5 (average 9.2 × 10−5) and tan δHP = 1.0 × 10−6 (average 1.2 × 10−6) for superconducting lumped elements with 350 nm-thick amorphous films can be achieved in single- and multi-photon regimes at sub-20 mK, correspondingly. These values are extracted by characterizing superconducting resonators with integrated parallel-plate capacitors (C = 0.2…6.0 pF) for a frequency range from 4.0 to 7.0 GHz. The presented low-loss a-Si:H films can be useful for various superconducting quantum applications, which is illustrated by the fabrication of lumped-element bandpass filters with a well-predicted amplitude–frequency response characteristic.
Abstract Increasing the density of superconducting circuits requires compact components, however, superconductor-based capacitors typically perform worse as dimensions are reduced due to loss at surfaces and interfaces. Here, parallel plate capacitors composed of aluminum-contacted, crystalline silicon fins are shown to be a promising technology for use in superconducting circuits by evaluating the performance of lumped element resonators and transmon qubits. High aspect ratio Si-fin capacitors having widths below 300 nm with an approximate total height of 3 μm are fabricated using anisotropic wet etching of Si(110) substrates followed by aluminum metallization. The single-crystal Si capacitors are incorporated in lumped element resonators and transmons by shunting them with lithographically patterned aluminum inductors and conventional A l/A l O x /A l Josephson junctions respectively. Microwave characterization of these devices suggests state-of-the-art performance for superconducting parallel plate capacitors with low power internal quality factor of lumped element resonators greater than 500 k and qubit T 1 times greater than 25 μs. These results suggest that Si-Fins are a promising technology for applications that require low-loss, compact, superconductor-based capacitors with minimal stray capacitance.
Lumped-element inductors are an integral component in the circuit QED toolbox. However, it is challenging to build inductors that are simultaneously compact, linear, and low-loss with standard approaches that either rely on the geometric inductance of superconducting thin films or on the kinetic inductance of Josephson-junction arrays. In this work, we overcome this challenge by utilizing the high kinetic inductance offered by superconducting granular aluminum (grAl). We demonstrate lumped-element inductors with a few nH of inductance that are up to 100 times shorter than inductors built from pure aluminum (Al). To characterize the properties of these linear inductors, we first report on the performance of lumped-element resonators built entirely out of grAl with sheet inductances varying from 30 – 320 pH/sq and self-Kerr nonlinearities of 0.2 – 20 Hz / photon . Further, we demonstrate integration of these grAl inductors into hybrid resonators with Al or tantalum ( Ta ) capacitor electrodes without increasing total internal losses. Interestingly, the measured internal quality factors systematically decrease with increasing room-temperature resistivity of the grAl film for all devices, indicating a trade-off between compactness and internal loss. For our lowest resistivity grAl films, we measure quality factors reaching 3.5 × 10 6 for the all-grAl devices and 4.5 × 10 6 for the hybrid grAl/ Ta devices, similar to state-of-the-art quantum circuits. Our loss analysis suggests that the surface-loss factor of grAl is similar to that of pure Al for our lowest resistivity films, while the increasing losses with resistivity could be explained by increasing inductor loss in the grAl film.
The investigation of two-level-state (TLS) loss in dielectric materials and interfaces remains at the forefront of materials research in superconducting quantum circuits. We demonstrate a method of TLS loss extraction of a thin film dielectric by using a lumped element resonator fabricated from a superconductor-dielectric-superconductor trilayer. We extract the dielectric loss by formulating a circuit model for a lumped element resonator with TLS loss and then fitting to this model using measurements from a set of three resonator designs: a coplanar waveguide resonator, a lumped element resonator with an interdigitated capacitor, and a lumped element resonator with a parallel plate capacitor that includes the dielectric thin film of interest. Unlike the commonly used single measurement technique, this method allows the accurate measurement of materials with TLS loss lower than 10−6. We demonstrate this method by extracting a TLS loss of 1.00×10−3 for sputtered Al2O3 using a set of samples fabricated from an Al/Al2O3/Al trilayer. We compare this method with the single measurement technique and observe a difference of 11% in extracted loss of the trilayer.
Dielectric loss in low-temperature superconducting integrated circuits can cause lower overall efficiency, particularly in the 90 to 220 GHz regime. We present a method to tune the dielectric loss for silicon oxide deposited by plasma-enhanced chemical-vapor deposition at ambient temperatures. Deposition in an environment with a higher silane-to-oxygen ratio produces silicon oxide films with a lower loss-tangent and a slightly higher optical index of refraction, while contributing no appreciable change in film stress. We measured the dielectric loss by fabricating a series of Nb-SiOx-Nb microstrip resonators in the frequency range of 6 to 9 GHz and comparing their temperature dependence to a model of parasitic two-level-system fluctuators. The dielectric loss-tangent of silicon oxide was improved from 6 ×10-3for stoichiometric silicon dioxide to 2 ×10-3for a more silicon-rich silicon oxide. We present details of the fabrication process and measurements of microstrip resonators.