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arXiv:2408.01369 · npj Quantum Information

Fabrication and characterization of low-loss Al/Si/Al parallel plate capacitors for superconducting quantum information applications

Anthony McFadden, Aranya Goswami, Tongyu Zhao, Teun A. J. van Schijndel, Trevyn F. Q. Larson, Sudhir Sahu, Stephen J. Gill, Florent Lecocq, Raymond W. Simmonds, C. J. Palmstrøm

Published Jan 22, 2025• 5 citations
arXivHTMLPDF

Abstract

Abstract Increasing the density of superconducting circuits requires compact components, however, superconductor-based capacitors typically perform worse as dimensions are reduced due to loss at surfaces and interfaces. Here, parallel plate capacitors composed of aluminum-contacted, crystalline silicon fins are shown to be a promising technology for use in superconducting circuits by evaluating the performance of lumped element resonators and transmon qubits. High aspect ratio Si-fin capacitors having widths below 300 nm with an approximate total height of 3 μm are fabricated using anisotropic wet etching of Si(110) substrates followed by aluminum metallization. The single-crystal Si capacitors are incorporated in lumped element resonators and transmons by shunting them with lithographically patterned aluminum inductors and conventional A l/A l O x /A l Josephson junctions respectively. Microwave characterization of these devices suggests state-of-the-art performance for superconducting parallel plate capacitors with low power internal quality factor of lumped element resonators greater than 500 k and qubit T 1 times greater than 25 μs. These results suggest that Si-Fins are a promising technology for applications that require low-loss, compact, superconductor-based capacitors with minimal stray capacitance.

DOI
10.1038/s41534-025-00967-5

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•Aug 25, 2021•0 citations
Abstract Increasing the density of superconducting circuits requires compact components, however, superconductor-based capacitors typically perform worse as dimensions are reduced due to loss at surfaces and interfaces. Here, parallel plate capacitors composed of aluminum-contacted, crystalline silicon fins are shown to be a promising technology for use in superconducting circuits by evaluating the performance of lumped element resonators and transmon qubits. High aspect ratio Si-fin capacitors having widths below 300 nm with an approximate total height of 3 μm are fabricated using anisotropic wet etching of Si(110) substrates followed by aluminum metallization. The single-crystal Si capacitors are incorporated in lumped element resonators and transmons by shunting them with lithographically patterned aluminum inductors and conventional A l/A l O x /A l Josephson junctions respectively. Microwave characterization of these devices suggests state-of-the-art performance for superconducting parallel plate capacitors with low power internal quality factor of lumped element resonators greater than 500 k and qubit T 1 times greater than 25 μs. These results suggest that Si-Fins are a promising technology for applications that require low-loss, compact, superconductor-based capacitors with minimal stray capacitance.
We address the scaling-up problem for superconducting quantum circuits by using lumped-element resonators based on an alternative fabrication method of aluminum-aluminum oxide-aluminum (Al-AlOx{\mathrm{AlO}}_{x}AlOx​-Al) parallel-plate capacitors. The size of the resonators is only 0.04mm20.04\phantom{\rule{0.2em}{0ex}}{\mathrm{mm}}^{2}0.04mm2, which is more than one order smaller than the typical size of coplanar resonators (1mm21\phantom{\rule{0.2em}{0ex}}{\mathrm{mm}}^{2}1mm2). The fabrication method we develop easily fits into the standard superconducting qubit fabrication process. We obtain capacitance per area $14\phantom{\rule{0.2em}{0ex}}\mathrm{fF}/\text{\ensuremath{\mu}}{\mathrm{m}}^{2}$ and the internal quality factor $1\ifmmode\times\else\texttimes\fi{}{10}^{3}$--$8\ifmmode\times\else\texttimes\fi{}{10}^{3}$ at the single-photon level. Our results show that such devices based on Al-AlOx{\mathrm{AlO}}_{x}AlOx​-Al capacitors could be further applied to the qubit readout scheme, including resonators, filters, amplifiers, as well as microwave metamaterials and innovative types of qubits, such as $0\ensuremath{-}\ensuremath{\pi}$ qubit.
We have fabricated superconducting microwave resonators in a lumped element geometry using single crystal silicon dielectric parallel plate capacitors with C>2 pF. Aluminum devices with resonant frequencies between 4.0 and 6.5 GHz exhibited an average internal quality factor Qi of 2×105 in the single photon excitation regime at T=20 mK. Attributing the observed loss solely to the capacitive element, our measurements place an upper bound on the loss tangent of the silicon dielectric layer of tan δi=5×10−6. This level of loss is an order of magnitude lower than is currently observed in structures incorporating amorphous dielectric materials, thus making single crystal silicon capacitors an attractive, robust route for realizing long-lived quantum circuits.
A merged-element transmon (MET) device based on silicon (Si) fins is proposed, and the first steps to form such a “FinMET” are demonstrated. This new application of fin technology capitalizes on the anisotropic etch of Si(111) relative to Si(110) to define atomically flat, high aspect ratio Si tunnel barriers with epitaxial superconductor contacts on parallel sidewall surfaces. This process circumvents the challenges associated with the growth of low-loss insulating barriers on lattice matched superconductors. By implementing low-loss, intrinsic float-zone Si as the barrier material rather than commonly used, potentially lossy AlOx, the FinMET is expected to overcome problems with standard transmons by (1) reducing dielectric losses; (2) minimizing the formation of two-level system spectral features; (3) exhibiting greater control over barrier thickness and qubit frequency spread, especially when combined with commercial fin fabrication and atomic-layer or digital etching; (4) potentially reducing the footprint by several orders of magnitude; and (5) allowing scalable fabrication. Here, as a first step to making such a device, the fabrication of Si fin capacitors on Si(110) substrates with shadow-deposited Al electrodes is demonstrated. These fin capacitors are then fabricated into lumped element resonator circuits and probed using low-temperature microwave measurements. Further thinning of silicon junctions toward the tunneling regime will enable the scalable fabrication of FinMET devices based on existing silicon technology while simultaneously avoiding lossy amorphous dielectrics for the tunnel barriers.
Amorphous hydrogenated silicon (a-Si:H) based lumped elements are one of the promising ways for large-scale integration of superconducting quantum devices. We present a detailed study devoted to the plasma-enhanced chemical vapor deposition process parameters' influence on the structure and morphology of a-Si:H dielectric thin films. We experimentally demonstrate a microcrystalline-to-amorphous growth transition by changing the H2/SiH4 ratio and establish a relationship between the film's structure, thickness, and dielectric loss tangent (tan δ). It is shown that the best dielectric loss tangents of tan δLP = 4.5 × 10−5 (average 9.2 × 10−5) and tan δHP = 1.0 × 10−6 (average 1.2 × 10−6) for superconducting lumped elements with 350 nm-thick amorphous films can be achieved in single- and multi-photon regimes at sub-20 mK, correspondingly. These values are extracted by characterizing superconducting resonators with integrated parallel-plate capacitors (C = 0.2…6.0 pF) for a frequency range from 4.0 to 7.0 GHz. The presented low-loss a-Si:H films can be useful for various superconducting quantum applications, which is illustrated by the fabrication of lumped-element bandpass filters with a well-predicted amplitude–frequency response characteristic.
The large physical size of superconducting qubits and their associated on-chip control structures presents a practical challenge toward building a large-scale quantum computer. In particular, transmons require a high-quality-factor shunting capacitance that is typically achieved by using a large coplanar capacitor. Other components, such as superconducting microwave resonators used for qubit state readout, are typically constructed from coplanar waveguides, which are millimeters in length. Here, we use compact superconducting through-silicon vias to realize lumped-element capacitors in both qubits and readout resonators to significantly reduce the on-chip footprint of both of these circuit elements. We measure two types of devices to show that through-silicon vias are of sufficient quality to be used as capacitive circuit elements and provide a significant reduction in size over existing approaches.
A merged-element transmon (MET) device, based on Si fins, is proposed and the steps to form such a are demonstrated. This new application of fin technology capitalizes on the anisotropic etch of Si(111) relative to Si(110) to define atomically flat, high aspect ratio Si tunnel barriers with epitaxial superconductor contacts on the parallel side-wall surfaces. This process circumvents the challenges associated with the growth of low-loss insulating barriers on lattice matched superconductors. By implementing low-loss, intrinsic float-zone Si as the barrier material rather than commonly used, lossy Al2O3, the FinMET is expected to overcome problems with standard transmons by (1) reducing dielectric losses; (2) minimizing the formation of two-level system spectral features; (3) exhibiting greater control over barrier thickness and qubit frequency spread, especially when combined with commercial fin fabrication and atomic-layer digital etching; (4) reducing the footprint by four orders of magnitude; and (5) allowing scalable fabrication. Here, fabrication of Si fins on Si(110) substrates with shadow-deposited Al electrodes is demonstrated. The formation of FinMET devices is expected to allow tunnel junction patterning with optical lithography. This facilitates uniform fabrication on Si wafers based on existing infrastructure for fin-based devices while simultaneously avoiding lossy amorphous dielectrics for tunnel barriers.