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IEEE Transactions on Applied Superconductivity

High performance packaging system for superconducting electronics

Dmitri V. Gaidarenko, R. P. Robertazzi

Published Jun 1, 1999• 10 citations
Publisher

Abstract

We demonstrate a packaging system/test probe suitable for testing complex, large scale superconducting integrated circuits with thousands of Josephson junctions. The cryopackage is designed to work with a 1 cm superconducting die, with liquid He immersion cooling using a standard storage dewar. The package has 80 high-speed input-output lines (DC to 20 GHz) which connect the chip to room temperature electronics. The tip of the cryopackage, containing the chip, is shielded from the ambient magnetic field with two mumetal cylinders and contains a built-in coil, which provides in-situ degaussing of the inner shield. To clear flux trapped in the chip being tested, the probe contains a novel gas manifold and a system of heaters. During the defluxing operation, a heater evaporates liquid helium inside the chip enclosure, the expanding vapor purging the liquid from the sample cell and warming the chip above its transition temperature. Once the chip is defluxed, the liquid helium is allowed back into the cell, at a rate slow enough to avoid trapping flux in the chip while it is cooled. The process can be automated and does not require any movement of the probe once inserted in the dewar.

DOI
10.1109/77.783824

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•May 1, 2000•0 citations
We demonstrate a packaging system/test probe suitable for testing complex, large scale superconducting integrated circuits with thousands of Josephson junctions. The cryopackage is designed to work with a 1 cm superconducting die, with liquid He immersion cooling using a standard storage dewar. The package has 80 high-speed input-output lines (DC to 20 GHz) which connect the chip to room temperature electronics. The tip of the cryopackage, containing the chip, is shielded from the ambient magnetic field with two mumetal cylinders and contains a built-in coil, which provides in-situ degaussing of the inner shield. To clear flux trapped in the chip being tested, the probe contains a novel gas manifold and a system of heaters. During the defluxing operation, a heater evaporates liquid helium inside the chip enclosure, the expanding vapor purging the liquid from the sample cell and warming the chip above its transition temperature. Once the chip is defluxed, the liquid helium is allowed back into the cell, at a rate slow enough to avoid trapping flux in the chip while it is cooled. The process can be automated and does not require any movement of the probe once inserted in the dewar.
We have developed a cryogenic probe and cryostat system to test both active and passive superconducting devices and circuits up to microwave frequencies at variable temperatures. Our system consists of two basic parts: the cryostat and the matching probe. The cryostat is a unique, very efficient, variable temperature, flow-type cryostat, where we control temperature without electrical heaters. It is magnetically shielded and allows rapid testing between 4.2 K and room temperature. Probes developed for this cryostat have a larger number of shorter cables than standard dip-type probes. They are designed to test chips or chip assemblies without additional packaging. Chips or chip assemblies can be quickly mounted and dismounted from a fixed spring-contact assembly. Each probe has 56 wide-bandwidth signal cables. We have repeatedly used these probes for testing both active and passive superconducting integrated circuits up to 20 GHz. The probe and cryostat combination provides a testing capability that is simultaneously high frequency, dc magnetic shielded, has variable cryogenic temperature, and quick turnaround.
Future development of superconductor digital and mixed-signal ICs requires extensive testing with a large number of input/output (I/O) lines for applying independent bias controls, injecting test signals, and monitoring outputs of different sub-circuits. There is a growing need for a standardized test apparatus for a variety of complex superconducting chips and multichip modules (MCMs). Such a test apparatus must support many I/O lines, be easy and cost-effective to operate, and support prolonged automated testing. Existing test apparatus include liquid He cryoprobes and cryocooled custom digital-RF systems, both of which have drawbacks. Liquid He cryoprobes with universal wiring, such as 40 or 80 coaxial cables, are convenient to use. Cooled by immersion in a tank filled with liquid He, these cryoprobes allow rapid cool-down and warm-up. However, large consumption of liquid He, the cost of which has been steadily increasing worldwide, makes this solution rather expensive and wasteful. On the other hand, one can exploit the modular reconfigurability of HYPRES' digital-RF receiver product to create a testbed for different ICs. Such a system uses the smallest commercially available closed-cycle refrigerator (~1.2 kW) and has negligible operating cost. However, reconfiguration takes time and expertise since these products are specially designed with customized chip package and wiring to minimize the thermal load on the cryocooler. These low-maintenance systems are ideal for prolonged operation of a single chip, which is invaluable for superconductor electronics system developers and end-users. The integrated cryoelectronics testbed (ICE-T) combines the advantages of the liquid He cryoprobe and the cryocooled digital-RF product. By using a more powerful, commercially available, electrically powered closed-cycle refrigerator (7 kW), ICE-T alleviates the thermal constraints on wiring while maintaining very low operating cost. By separating the electrical and thermal subsystems, it maintains modularity without sacrificing the universality of the cryoprobe. A set of universal and custom electrical modules can be independently built and inserted in ICE-T. Universal inserts with 40 and 80 coaxial cables accommodate all chips with standard I/O pads like the familiar liquid He cryoprobes. Custom inserts for different classes of chips and MCMs are designed and built according to user requirements and specifications. The utility of the ICE-T was successfully demonstrated by testing a benchmark superconducting digital circuit at low frequency and an analog-to-digital converter chip clocked above 20 GHz.
With the current progress of superconducting integrated circuits, circuit complexities have reached more than 100,000 Josephson junctions. At the laboratory environment, circuit tests are generally being conducted at liquid Helium environments. With the commercialization of the superconducting integrated circuit-based systems and/or price increase of liquid Helium, utilization of the closed-cycle systems will be inevitable. Even though it is possible to implement closed-cycle systems with quite substantial excess cooling powers after all the wirings and peripheral circuits, one point not to be overlooked is the power density at the superconducting chips. We have observed that the circuits designed for operation at liquid Helium bath have much higher power densities that exceed the heat flux capacities of closed-cycle cryocoolers. We have measured that the heat flux capacities of closed-cycle systems are about 0.1 W/cm2{}^{2}2 when the chip is in vacuum. Thus, if the power density in any of the bias resistors are higher than these values, it is difficult to keep the chip in superconducting state. With the positive feedback from a local hot spot under current bias, the chip rapidly heats up due to Joule heating. To increase the limit of power density, we propose an encapsulation method that increases the heat flux capacity of the system. With the encapsulation, the heat flux capacity of the system is increased to about 0.4 W/cm2{}^{2}2.
A cryocooled system with I/O interface circuits, which enables high-speed system operation of superconductive single-flux-quantum (SFQ) circuits at over 40GHz, and the demonstration of a 47-Gbps SFQ 2×2 switch system are presented. The cryocooled system has 32 I/Os and cools an SFQ multi-chip module (MCM) to 4K with a two-stage 1W Gifford-McMahon cryocooler. An SFQ 4:1 multiplexer (MUX) and an SFQ 1:4 demultiplexer (DEMUX) have been designed to interface the speed gap between the I/O (-10Gbps/ch) and SFQ circuits (>40GHz). An SFQ 2×2 switch chip, in which the MUX/DEMUX and an SFQ 2×2 switch are integrated, and an 8-channel superconductive voltage driver (SVD) chip have been designed with an advanced cell library for a junction critical current density of 10kA/cm2. An SFQ 2×2 switch MCM has been made by flip-chip bonding the switch chip and SVD chip on a superconductive MCM carrier with ∅50-μm InSn solder bumps. An SFQ 2×2 switch system, which is the switch MCM packaged in the cryocooled system, has been demonstrated up to a port speed of 47Gbps for the first time.
A laboratory-purpose submillimeter wavelength receiver is developed and tested. The device can in situ detect the spectrum of an rf source working below 100 K within the frequency range 400-600 GHz. A sample is placed close to the receiver sensor; both are in vacuum inside the probe stick and cooled by liquid helium in the standard transport dewar. The quasioptical sensor design is based on the superconducting integrated receiver chip; its noise temperature below 300 K was measured at /spl ap/500 GHz with a variable-temperature black body. The output level of the tester is suitable for the direct readout by a spectrum analyzer. Details of the design and main test data are reported.
We report on design and first application of a laboratory-purpose tester which can in situ detect spectrum of sub-millimeter wave emission within frequency range of 400600 GHz from virtually any compact low-power source working within temperature range below 100 K. Both the receiver and the sample are placed in vacuum inside a laboratory test stick of diameter 50 mm, which is cooled down in a standard transport vessel for liquid helium. The sensor of the tester is designed on a base of the superconducting integrated receiver (SIR) chip working below 5 K. The chip sensor, beside the quasi-optical SIS mixer, contains an internal electronically tuned superconducting local oscillator, that provide low-noise operation at the level below 300 K DSB at central frequencies of 480-520 GHz as measured with a black body at the position of the test source. The signal detected by the SIS mixer is boosted by a helum-cold low-noise amplifier (G=20 dB, TN=10 K) within frequency range 12 GHz and then by a second room temperature amplifier (G=53 dB, TN=90 K) both mounted within the same test stick. The output level is sufficient for direct application to most of standard RF recorders, e. g. for a spectrum analyzer. To detect weak signals, a compact chopper-wing has been designed and placed at the input of the receiver module. Details of design and main test data measured at DC and RF are reported.