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Conference on Precision Electromagnetic Measurements

Preliminary results on the analog-to-digital converter based on RSFQ logic

Vasili K. Semenov, Y.A. Polyakov, D.F. Schneider

Published Dec 24, 2002• 14 citations
Publisher

Abstract

The first laboratory prototype of a superconductor analog-to-digital converter (ADC) with on-chip fast digital signal processing has been designed and tested at internal clock frequencies up to 7 GHz. Estimated accuracy of the prototype is about 12 bit for 7 MHz signal bandwidth; at lower frequencies the dynamic range increases at least as fast as the reciprocal bandwidth. The single-chip (5/spl times/5 mm/sup 2/) device contains 1778 Josephson junctions and dissipates power at about 0.5 mW.

DOI
10.1109/cpem.1996.547399

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IEEE Transactions on Applied Superconductivity•Jun 1, 1999•49 citations
The first laboratory prototype of a superconductor analog-to-digital converter (ADC) with on-chip fast digital signal processing has been designed and tested at internal clock frequencies up to 7 GHz. Estimated accuracy of the prototype is about 12 bit for 7 MHz signal bandwidth; at lower frequencies the dynamic range increases at least as fast as the reciprocal bandwidth. The single-chip (5/spl times/5 mm/sup 2/) device contains 1778 Josephson junctions and dissipates power at about 0.5 mW.
Last year we presented the first fully operational superconducting Analog-to-Digital Converter (ADC) with on-chip Digital Signal Processing (DSP). Here we review this device and introduce completed and prospective innovations required to exceed the performance of the best semiconductor counterparts. The ADC chip contains 2 basic parts: a "fundamental" ADC operating at about 20 GHz sampling rate and a digital decimation filter which attenuates high-frequency noise components and reduces the sampling rate to match it with the bandwidth of an input signal. Our short term goal is to achieve 14 bits Spurious Free Dynamic Range (SFDR) for 60 MHz signal bandwidth by using the standard 1000 A/cm/sup 2/ Nb-trilayer fabrication technology commercially available at HYPRES, Inc.
Ultrafast switching speed, low power, natural quantization of magnetic flux, quantum accuracy, and low noise of cryogenic superconductor circuits enable fast and accurate data conversion between the analog and digital domains. Based on rapid single-flux quantum (RSFQ) logic, these integrated circuits are capable of achieving performance levels unattainable by any other technology. Two major classes of superconductor analog-to-digital converters (ADCs) are being developed - Nyquist sampling and oversampling converters. Complete systems with digital sampling at rates of /spl sim/20 GHz and above have been demonstrated using low-temperature superconductor device technology. Some ADC components have also been implemented using high-temperature superconductors. Superconductor ADCs have unique applications in true digital-RF communications, broadband instrumentation, and digital sensor readout. Their designs, test results, and future development trends are reviewed.
We describe the design of an oversampling single-flux-counting analog-to-digital converter with the estimated bandwidth of a few tens of MHz, based on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an input analog circuit, high-speed quantizer with an original analog/digital negative feedback loop, decimation (comb) filter, and supporting subsystems including clock distribution circuits, quantization signal conditioner, and output drivers. We have applied a new approach, the 'symmetrizing' negative feedback, to free the quantizer from the intrinsic hysteresis without dynamic range sacrifice. The 16-bit version of the system comprises about 1,500 Josephson junctions and consumes 1.2 mW of DC power, when implemented using Nb-trilayer technology with 1 kA/cm/sup 2/, 3.5 /spl mu/m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.>
Wireless applications would be less expensive, more flexible, and more robust if they had more digital and less analog circuitry. The problem is implementing digital signal processing at radio frequencies. Conventional data converters (ADCs and DACs) and digital circuits are simply not fast enough. However, superconductors can provide ultra fast mixed signal and digital circuits with the linearity and dynamic range required for true direct, digital-RF processing. These superconducting circuits are digital ICs based on Josephson junctions and "rapid-single-flux-quantum" logic (RSFQ), where switching speeds up to 750 GHz have been demonstrated enabling true digital-RF architecture at clock speeds eventually up to 160 GHz. This permits direct conversion between analog RF and digital baseband signals, replacing frequency and protocol-specific analog hardware with flexible digital processors. Data conversion in high frequency wireless applications at frequencies up to 50 GHz will soon become practical. Hypres recently delivered a HF-VHF all digital RF receiver (ADR) prototype to ONR. Testing of this ADR has demonstrated the superior performance of superconducting ICs in cryocooled systems. A US Navy laboratory is now evaluating the world's first complete prototype digital RF receiver capable of direct digitization from DC to 2 GHz
Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. We report recent advances in the low-pass phase-modulation-demodulation (PMD) oversampled analog-to-digital converter (ADC). The oversampled data from the PMD front-end are passed along with sampling clock to an on-chip digital filter. In the past, the maximum frequency of operation of such chips were limited by that of the digital decimation filter (DDF) to about 30 GHz. Recently, we have designed a chip that allows the PMD front-end to be clocked twice as fast as the DDF, resulting in sampling rates of 46.08 GHz and 29.44 GHz for chips with critical current densities of 4.5 and 1 kA/cm2respectively. We have also designed a new PMD front-end, with a quarter-rate quantizer (QRQ) that allows 18-20 dB extension of dynamic range. We are also pursuing a subranging ADC design with two PMD front-ends connected with fluxon amplifier and subtractor circuitry that promises a dynamic range extension by 25-30 dB. We report signal-to-noise ratio and spur-free dynamic range measurement results for various ADC chips, and project performance for future improvements.
We present results of a preliminary analysis of possible front-ends of a software defined radio base station receiver containing superconductor Rapid Single-Flux-Quantum (RSFQ) components. The main component of such a front-end, an oversampling analog-to-digital converter (ADC) with expected internal clock rate up to 20 GHz has already been developed and fabricated with commercially available 3.5-/spl mu/m, 1-kA/cm/sup 2/ niobium-trilayer technology. Simulations show that, even with such crude feature size, the superconductor ADC components can outperform their semiconductor counterparts.