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International Conference on Field-Programmable Technology (FPT)

FPGA-based high-speed emulator of quantum computing

Minoru Fujishima

Published Jun 30, 2004• 25 citations
Publisher

Abstract

Quantum computers are believed to perform high-speed calculations, compared with conventional computers. However, the quantum computer has inherent issues. Firstly, it solves NP (non-deterministic polynomial) problems at a high speed only when a periodic function can be used in the process of calculation. Secondly, it is extremely difficult to increase the problem scale to be solved, which is determined by the number of quantum bits. To overcome the restrictions stemming from the quantum algorithm, we are studying the emulation by a FPGA (field programmable gate array). In this paper, first, it is explained why a periodic function is required for the algorithm of a quantum computer. Then, it is shown that the hardware emulator can solve NP problems at a high speed without using a periodic function.

DOI
10.1109/fpt.2003.1275727

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Quantum computers are believed to perform high-speed calculations, compared with conventional computers. However, the quantum computer has inherent issues. Firstly, it solves NP (non-deterministic polynomial) problems at a high speed only when a periodic function can be used in the process of calculation. Secondly, it is extremely difficult to increase the problem scale to be solved, which is determined by the number of quantum bits. To overcome the restrictions stemming from the quantum algorithm, we are studying the emulation by a FPGA (field programmable gate array). In this paper, first, it is explained why a periodic function is required for the algorithm of a quantum computer. Then, it is shown that the hardware emulator can solve NP problems at a high speed without using a periodic function.
Quantum computers are believed to perform high-speed calculations, compared with conventional computers. However, the quantum computer solves NP (non-deterministic polynomial) problems at a high speed only when a periodic function can be used in the process of calculation. To overcome the restrictions stemming from the quantum algorithm, we are studying the emulation by a LSI (large scale integrated circuit). In this report, first, it is explained why a periodic function is required for the algorithm of a quantum computer. Then, it is shown that the LSI emulator can solve NP problems at a high speed without using a periodic function.
A 16-qubit quantum-computing emulator executing quantum algorithms at high speed is proposed. By limiting the command of the quantum computing emulator to the minimum function required with the quantum algorithm, probability amplitudes are expressed with one bit and the functions of many qubits are integrated on a field programmable gate array (FPGA). As a result of implementing the emulator in the FPGA, it is found that the emulator has a 250 times higher-speed as compared with a software simulation by a general-purpose processor.
A high-speed and large-scale processor dedicated to quantum computing is proposed, which has the minimum operation function needed for execution of a quantum algorithm. In this processor, the probability amplitudes determined by the states of the quantum bits in the quantum computer are described using only one bit, and we named it a logic quantum processor. It is found that for this processor an execution speed 275 times higher than that of a software simulation is obtained when the processor executing the quantum algorithm for 16 qubit has been implemented in a FPGA. As an example application, it is shown that the processor can solve the satisfiability problem and that it can also simulate the decoherence in the quantum computer at high speed.
Quantum computing is regarded as the future of computing that hopefully provides exponentially large processing power compared to the conventional digital computing. However, current quantum computers do not have the capability to correct errors caused by environmental noise, so that it is difficult to run useful algorithms that require deep quantum circuits. Therefore, emulation of quantum circuits in digital computers is essential. However, emulation of large quantum circuits requires enormous amount of computations, and leads to a very large processing time. To reduce the processing time, we propose an FPGA emulator with high-bandwidth-memory to emulate quantum Fourier transform (QFT), which is a major part of many quantum algorithms. The proposed FPGA emulator is scalable in terms of both processing speed and the number of qubits, and extendable to multiple FPGAs. We performed QFT emulations up to 30 qubits using two FPGAs. According to the measured results, we have achieved 23.6 ~ 24.5 times speed-up compared to a fully optimized 24-core CPU emulator.
It can be shown that if quantum algorithms run on quantum computers, their processing speeds improve exponentially compared to their classical counterparts. However, due to the lack of quantum computers circuit model of quantum algorithms are currently simulated using classical computers to verify their functionalities. On the other hand, software simulation cannot use the intrinsic parallelism of quantum algorithm efficiently. To address the problem, in this paper hardware emulation of quantum algorithms are discussed. To emulate quantum algorithms using FPGAs, a new representation for quantum bits is emulated that improves the emulation of quantum circuits considerably. This representation could be used in both distinct and entangle qubit states.
Quantum hardware emulators using field programmable gate arrays (FPGAs) have been demonstrated to efficiently exploit the inherent parallelism of quantum algorithms and perform better than sequential software simulators. However, one key problem in mapping quantum circuits on FPGAs is the exponential increase in resource requirements with the increase in the number of quantum bits (qubits). As a result, the precision of hardware emulators is often reduced to save resources and accommodate larger quantum circuits which results in lower accuracy and lower throughput. In this paper, we present a full precision FPGA quantum emulator that uses 32-bit floating-point arithmetic and has a fully pipelined architecture. Our emulator is capable of emulating an entangled 4-qubit quantum system performing Quantum Fourier Transform, Grover's Search algorithms on a single FPGA node. Our experimental work was conducted on a highly scalable multi-node (multi-FPGA) state-of-the-art high-performance reconfigurable computer (HPRC). Experimental results show that our emulator is functionally accurate and has a higher operating frequency relative to other emulators. For emulating larger-scale circuits we propose using a multi-node architecture scheme with low latency, high bandwidth inter-node communication.