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arXiv:2607.08687

Low-latency FPGA-based electronic control system for fast preparation of defect-free atom arrays

Ya-Dong Hu, Dong-Qi Ma, Tian-Yang Zhang, Liang Chen, Yi-Chen Zhang, Xiao-Kang Zhong, Wen-Yi Zhu, Hong-Jie Fan, Qing-Xuan Jie, Yan-Lei Zhang, Gang Li, Xi-Feng Ren, Xu-Liang Zhang, Guang-Can Guo, Zhu-Bo Wang, Chang-Ling Zou

quant-phphysics.opticsSubmitted Jul 9, 2026• Announced Jul 10, 2026• 0 citations
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Abstract

The scalability of neutral atom quantum computing demands integrated electronic control systems with low latency, modular architecture, and real-time feedback capability. Here, we present an FPGA-based electronic control system that eliminates the PC from the feedback loop, integrating photon counting, real-time decision-making, and waveform generation within a unified PXIe architecture. The system achieves a total feedback latency of $282\,\mathrm{μs}$ and is validated in practical experiments by assembling defect-free atom arrays from 24 stochastically loaded optical tweezers. A single-round rearrangement achieves a filling fraction of $\sim96\%$, while feedback-controlled iterative rearrangement over five rounds boosts the success probability for generating a 10-atom defect-free array from $65.7\%$ to $95.4\%$. This system establishes the electronic infrastructure necessary for mid-circuit measurement and real-time quantum error correction on neutral-atom platforms.

Comments
8 pages, 5 figures

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The scalability of neutral atom quantum computing demands integrated electronic control systems with low latency, modular architecture, and real-time feedback capability. Here, we present an FPGA-based electronic control system that eliminates the PC from the feedback loop, integrating photon counting, real-time decision-making, and waveform generation within a unified PXIe architecture. The system achieves a total feedback latency of 282 μs282\,\mathrm{μs}282μs and is validated in practical experiments by assembling defect-free atom arrays from 24 stochastically loaded optical tweezers. A single-round rearrangement achieves a filling fraction of ∼96%\sim96\%∼96%, while feedback-controlled iterative rearrangement over five rounds boosts the success probability for generating a 10-atom defect-free array from 65.7%65.7\%65.7% to 95.4%95.4\%95.4%. This system establishes the electronic infrastructure necessary for mid-circuit measurement and real-time quantum error correction on neutral-atom platforms.
We present the Quantum Atom Control Kit (QuACK), a low-cost FPGA-based control system that provides memory-efficient precise signal timing and low-delay measurement-based decision making for operating neutral atom optical tweezer array experiments. The system consists of an FPGA module connected to a host computer via USB 3.0 and multiple cable-connected modular daughterboards enabling a myriad of configurable I/O formats. In this work, digital input and output as well as analog outputs are demonstrated. Multiple experimental sequence segments can be encoded with 5 ns timing resolution. On-chip condition kernels enable fast branching between segments based on digital inputs, eliminating host intervention for time-critical decisions, while high-speed USB communication allows rapid sequence updates and host-level orchestration. We demonstrate initial system loading and rearranging neutral ytterbium-171 atoms in optical tweezers. The combination of high-resolution timing, on-chip logic, and distributed orchestration architecture makes this system well suited for atomic, molecular, and optical (AMO) experiments pursuing applications in quantum information science.
Neutral Atom Quantum Computing (NAQC) is an emerging modality for scalable quantum computation, valued for its long coherence times and the naturally identical atomic qubits. However, one of the main drawbacks is its slow execution rate, dominated by lengthy classical processing tasks, such as fluorescence imaging, cooling, and atom rearrangement. We address this bottleneck with AtomFlow, a field-programmable gate array (FPGA)-based control architecture that consolidates fluorescence-image analysis and a newly developed atom-rearrangement algorithm onto a single Zynq UltraScale+ device. By co-locating the two stages on the same board and emitting rearrangement moves in a streaming fashion as soon as they are computed, AtomFlow eliminates the round-trip latency of conventional host-mediated pipelines. Evaluated on a 16x16 atom array, AtomFlow achieves an end-to-end latency of 25.3 ms with a first-move latency of 4 ms and an average move generation of 1 ms. Furthermore, our scalability analysis demonstrates that the architecture can readily support larger atom arrays within a single-board resource budget.
Defect-free atomic arrays have been demonstrated as a scalable and fully controllable platform for quantum simulations and quantum computations. To push the qubit size limit of this platform further, we design an integrated measurement and feedback system, based on field-programmable gate array (FPGA), to quickly assemble two-dimensional defect-free atomic array using maximum parallelisms. The total time cost of the rearrangement is first reduced by processing atom detection, atomic occupation analysis, rearrangement strategy formulation, and acousto-optic deflectors driving signal generation in parallel in time. Then, by simultaneously moving multiple atoms in the same row (column), we save rearrangement time by parallelism in space. To best utilize these parallelisms, we propose an alternative algorithm named the Tetris algorithm to reassemble atoms to arbitrary target array geometry from two-dimensional stochastically loaded atomic arrays. For an $L\ifmmode\times\else\texttimes\fi{}L$ target array geometry, the number of moves scales as LLL, and the total rearrangement time scales at most as L2{L}^{2}L2. Although in this work we do not test on actual atoms, we simulate the performance of our FPGA system experimentally with all components integrated except for the atoms. We present the overall performance for different target geometries, and demonstrate a dramatic boost in rearrangement time cost and the potential to scale up defect-free atomic array to 1000 atoms in room-temperature platform and 10 000 atoms in cryogenic environment.
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In this paper we present a flexible, high-performance, integrated qubit control system using modular PXIe equipment. To manipulate qubits, a classical control system is required to generate and acquire a mix of baseband, radio frequency, and/or optical signals, with the specific mix different for each qubit technology. Typically, a quantum system requires many of these signals with a high degree of synchronization and phase coherence, and increasingly needs real-time data processing and on-the-fly sequencing capabilities for feedback experiments. The proposed system is scalable to hundreds of channels, all of them being phase coherent and fully time-synchronized.The system includes a programmable real-time sequencer for precise execution timing and decision making; and open FPGA capabilities for custom Digital Signal Processing (DSP) by hardware. Using the latter, we present FPGA IP to generate one-/two-qubit gates efficiently with the AWG, and to analyze high-frequency signals to measure the qubit states in real time on the digitizers. This IP features very low latencies for Quantum Error Correction (QEC) and Frequency Division Multiplexing (FDM) capabilities, among others.
Neutral atoms have emerged as a promising technology for implementing quantum computers due to their scalability and long coherence times. However, the execution frequency of neutral atom quantum computers is constrained by image processing procedures, particularly the assembly of defect-free atom arrays, which is a crucial step in preparing qubits (atoms) for execution. To optimize this assembly process, we propose a novel quadrant-based rearrangement algorithm that employs a divide-and-conquer strategy and also enables the simultaneous movement of multiple atoms, even across different columns and rows. We implement the algorithm on Field Programmable Gate Arrays (FPGAs) to handle each quadrant independently (hardware-level optimization) while maximizing parallelization. To the best of our knowledge, this is the first hardware acceleration work for atom rearrangement, and it significantly reduces the processing time. This achievement also contributes to the ongoing efforts of tightly integrating quantum accelerators into High-Performance Computing (HPC) systems. Tested on a Zynq RFSoC FPGA at 250 MHz, our hardware implementation is able to complete the rearrangement process of a 30 × 30 compact target array, derived from a 50 × 50 initial loaded array, in approximately 1.0 μs. Compared to a comparable CPU implementation and to state-of-the-art FPGA work, we achieved about 54 x and 300 x speedups in the rearrangement analysis time, respectively. Additionally, the FPGA-based acceleration demonstrates good scalability, allowing for seamless adaptation to varying sizes of the atom array, which makes this algorithm a promising solution for large-scale quantum systems.