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arXiv:2606.27415

Elimination of Flux Trapping in Superconducting Circuits in Ambient Magnetic Fields

Rohan T. Kapur, Alex Wynn, Sergey K. Tolpygo, Neel Parmar, Anil Mankame, Adam A. Libson, Rabindra Das, Michele Kelley, Pauli Kehayias, Nathaniel J. O'Connor, Collin N. Muniz, Justin L. Mallek, Jennifer M. Schloss

cond-mat.supr-concond-mat.mes-hallphysics.app-phquant-phSubmitted Jun 25, 2026• Announced Jun 26, 2026• 0 citations
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Abstract

Superconductor digital electronics and quantum computing with superconducting qubits are promising next-generation computing technologies. When cooled down or operated in the presence of a nonzero background magnetic field $B_r$, superconducting thin films comprising the circuits can trap magnetic vortices that can degrade circuit or qubit performance. In this work, we report a practical solution for eliminating flux trapped during cooldown in ambient magnetic fields, $B_r\leq 60$ $\upmu$T, based on controlled local thermal gradients and moats, etched holes in the superconducting films of the circuit. Thermal gradients created by integrated on-chip resistive heaters move vortices towards the moats, where they become trapped away from circuitry regions and pinning sites. Using magnetic imaging and electrical circuit readout, we demonstrate that this approach is capable of removing magnetic flux trapped during field cooling and magnetic flux nucleated by circuit operation. If used in an environment with basic magnetic shielding, this solution is capable of suppressing all magnetic flux in a large-scale circuit, overcoming one of the long-standing challenges preventing high-performance scalable computing using superconductors.

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•Nov 16, 2009•32 citations
Superconductor digital electronics and quantum computing with superconducting qubits are promising next-generation computing technologies. When cooled down or operated in the presence of a nonzero background magnetic field BrB_rBr​, superconducting thin films comprising the circuits can trap magnetic vortices that can degrade circuit or qubit performance. In this work, we report a practical solution for eliminating flux trapped during cooldown in ambient magnetic fields, Br≤60B_r\leq 60Br​≤60 \upmu\upmu\upmuT, based on controlled local thermal gradients and moats, etched holes in the superconducting films of the circuit. Thermal gradients created by integrated on-chip resistive heaters move vortices towards the moats, where they become trapped away from circuitry regions and pinning sites. Using magnetic imaging and electrical circuit readout, we demonstrate that this approach is capable of removing magnetic flux trapped during field cooling and magnetic flux nucleated by circuit operation. If used in an environment with basic magnetic shielding, this solution is capable of suppressing all magnetic flux in a large-scale circuit, overcoming one of the long-standing challenges preventing high-performance scalable computing using superconductors.
Trapped magnetic flux has been a long-standing problem in superconducting digital and quantum circuits, significantly affecting their reliability and limiting practical applications. Mitigation techniques like integrating moat structures into circuit layouts and increasing magnetic shielding have been in use to improve the probability of an accurate circuit operation. However, none of the methods can reliably and deterministically achieve the desired flux-free state of superconducting circuits. Active flux management can potentially solve this problem by the removal of the trapped flux from the relevant circuit areas on a chip. Here, we report numerical modelling and experimental scanning SQUID imaging results showing flux manipulation on the single vortex level using a network of pulsed electric lines in a test superconducting single layer circuit. We demonstrate the effect of vortex sweeping in areas with control lines as well as sweeping of vortices into moats via Lorentz force mechanism. This method can potentially be expanded to larger and more sophisticated digital and quantum chips.
We report experimental investigations of a simple structure, called a moat, which significantly reduces the probability of flux-trapping in Josephson SQUIDs. Proper operation of Josephson logic and memory circuits requires that the SQUIDs be free of stray magnetic flux that may become trapped in the superconducting groundplane upon cooling through the critical temperature. The problem is particularly severe for so-called holey SQUIDs which rely on holes in the groundplane to obtain suitably large device inductances. Moats are rectangular channels in the groundplane surrounding the SQUID's which provide preferred sites for trapping flux, thus preventing such flux from coupling to the SQUID. We have measured the effectiveness of moats by monitoring the flux trapped in the moats and comparing it to the flux trapped in the associated SQUID as a function of applied field. The number of flux quanta in the moat is determined by measuring the shift of the threshold curve of a two-junction SQUID coupled to the moat. The data indicates that at fields on the order of a mG, moats reduce the sensitivity of holey SQUIDs to trapped flux by at least several orders of magnitude. As the chips are cooled through Tc, transient magnetic fields are produced in the metallic sample holder parts surrounding the chip by thermal-gradient-induced EMF's. The effects of such magnetic fields on the flux trapping behaviour of the SQUIDs are also reported.
A variety of superconductor integrated circuits composed of six ac-powered SFQ shift registers with a total of 27078 bits and 108500 Josephson junctions (JJs) per 5 mm × 5 mm chip have been designed, fabricated, and tested to characterize flux trapping, fabrication process yield, and parameter spread. The six 4513-bit registers in the circuits have a common single-phase ac clock and individual input/output drivers, allowing for their parallel testing. We have investigated flux trapping in the circuits with various geometry, size, distance between moats in active ground planes (GPs), and containing up to three additional ‘dummy’ GPs, using multiple cooldowns through the critical temperature with various cooling rates and residual magnetic fields up to ∼ 1.2 µT. For the slit-type and square moats arrayed along the sides of the register cells, we have found a negligible effect of flux sequestered in the moats on the operating margins of the registers, and a negligible probability of detrimental flux trapping outside of the moats. Circuits with 0.3-µm-wide slit moats occupying less than 2% of the circuit area were fully operational in 100% of cooldowns, supporting the viability of a very large-scale integration of superconductor digital circuits. We have also found a strong enhancement of flux trapping outside the moats in circuits with closely spaced GPs and determined a critical distance,${{{\boldsymbol{t}}}_{\boldsymbol{c}}} \approx $0.6 µm, between them. The presence of two or more GPs spaced below thetcrendered the circuits nonoperational in 100% of cooldowns. We have measured 30 chips with over 3M JJs and determined individual cell operating margins in 138 registers to characterize the fabrication-related parameter spread and detect fabrication defects and flux-trapping events. By finding outlier bit-cells in the statistical distribution of the individual cell margins, we detected about one fabrication defect per million JJs, in most cases causing magnetic flux trapping in the affected cell.The circuits have been fabricated in the SFQ5ee fabrication process at MIT Lincoln Laboratory (MIT LL).
Microwave resonators with high quality factors have enabled many recent breakthroughs with superconducting qubits and photon detectors, typically operated in shielded environments to reduce the ambient magnetic field. Insufficient shielding or pulsed control fields can introduce vortices, leading to reduced quality factors, although increased pinning can mitigate this effect. A narrow slot etched into the resonator surface provides a straightforward method for pinning enhancement without otherwise affecting the resonator. Resonators patterned with such a slot exhibited over an order of magnitude reduction in the excess loss due to vortices compared with identical resonators from the same film with no slot.
The coherence of superconducting transmon qubits is often disrupted by fluctuations in the energy relaxation time (T1), limiting their performance for quantum computing. While background magnetic fields can be harmful to superconducting devices, we demonstrate that both trapped magnetic flux and externally applied static magnetic fields can suppress temporal fluctuations in T1 without significantly degrading its average value or qubit frequency. Using a three-axis Helmholtz coil system, we applied calibrated magnetic fields perpendicular to the qubit plane during cooldown and operation. Remarkably, transmon qubits based on tantalum-capped niobium (Nb/Ta) capacitive pads and aluminum-based Josephson junctions (JJs) maintained T1 lifetimes near 300 μs even when cooled in fields as high as 600 mG. Both trapped flux up to 600 mG and applied fields up to 400 mG reduced T1 fluctuations by more than a factor of two, while higher field strengths caused rapid coherence degradation. We attribute this stabilization to the polarization of paramagnetic impurities, the role of trapped flux as a sink for non-equilibrium quasiparticles (QPs), and partial saturation of fluctuating two-level systems (TLSs). These findings challenge the conventional view that magnetic fields are inherently detrimental and introduce a strategy for mitigating noise in superconducting qubits, offering a practical path toward more stable and scalable quantum systems.
Microwave resonators with high quality factors have enabled many recent breakthroughs with superconducting qubits and photon detectors, typically operated in shielded environments to reduce the ambient magnetic field. Insufficient shielding or pulsed control fields can introduce vortices, leading to reduced quality factors, although increased pinning can mitigate this effect. A narrow slot etched into the resonator surface provides a straightforward method for pinning enhancement without otherwise affecting the resonator. Resonators patterned with such a slot exhibited over an order of magnitude reduction in the excess loss due to vortices compared with identical resonators from the same film with no slot.