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IEEE Transactions on Magnetics

Moat-guarded Josephson SQUIDs

Stuart Bermon, Tushar R. Gheewala

Published May 1, 1983• 65 citations
Publisher

Abstract

We report experimental investigations of a simple structure, called a moat, which significantly reduces the probability of flux-trapping in Josephson SQUIDs. Proper operation of Josephson logic and memory circuits requires that the SQUIDs be free of stray magnetic flux that may become trapped in the superconducting groundplane upon cooling through the critical temperature. The problem is particularly severe for so-called holey SQUIDs which rely on holes in the groundplane to obtain suitably large device inductances. Moats are rectangular channels in the groundplane surrounding the SQUID's which provide preferred sites for trapping flux, thus preventing such flux from coupling to the SQUID. We have measured the effectiveness of moats by monitoring the flux trapped in the moats and comparing it to the flux trapped in the associated SQUID as a function of applied field. The number of flux quanta in the moat is determined by measuring the shift of the threshold curve of a two-junction SQUID coupled to the moat. The data indicates that at fields on the order of a mG, moats reduce the sensitivity of holey SQUIDs to trapped flux by at least several orders of magnitude. As the chips are cooled through Tc, transient magnetic fields are produced in the metallic sample holder parts surrounding the chip by thermal-gradient-induced EMF's. The effects of such magnetic fields on the flux trapping behaviour of the SQUIDs are also reported.

DOI
10.1109/tmag.1983.1062291

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We report experimental investigations of a simple structure, called a moat, which significantly reduces the probability of flux-trapping in Josephson SQUIDs. Proper operation of Josephson logic and memory circuits requires that the SQUIDs be free of stray magnetic flux that may become trapped in the superconducting groundplane upon cooling through the critical temperature. The problem is particularly severe for so-called holey SQUIDs which rely on holes in the groundplane to obtain suitably large device inductances. Moats are rectangular channels in the groundplane surrounding the SQUID's which provide preferred sites for trapping flux, thus preventing such flux from coupling to the SQUID. We have measured the effectiveness of moats by monitoring the flux trapped in the moats and comparing it to the flux trapped in the associated SQUID as a function of applied field. The number of flux quanta in the moat is determined by measuring the shift of the threshold curve of a two-junction SQUID coupled to the moat. The data indicates that at fields on the order of a mG, moats reduce the sensitivity of holey SQUIDs to trapped flux by at least several orders of magnitude. As the chips are cooled through Tc, transient magnetic fields are produced in the metallic sample holder parts surrounding the chip by thermal-gradient-induced EMF's. The effects of such magnetic fields on the flux trapping behaviour of the SQUIDs are also reported.
We have investigated the flux state in high- and low- T c SFQ circuits having superconducting ground planes with moats by a scanning SQUID microscope (SSM) system. Observation of YBa 2 Cu 3 O y (YBCO) sampler circuits having superconducting ground planes with 5 µm-wide moats confirmed that magnetic flux was excluded from the moat-surrounded area including ramp-edge Josephson junctions. The threshold value for complete flux exclusion was about 0.8 µT slightly depending on chips, which can be achieved readily with dual μ-metal magnetic shielding. Moreover, we have observed the flux state in Nb multilayer structures having a superconducting ground plane with 4 µm wide moats, which was designed and fabricated using the CONNECT cell library. It was confirmed that magnetic flux was trapped selectively into moats with appropriate configuration, which were fabricated within each 40 µm × 40 µm unit cell.
Abstract Flux trapping in superconducting integrated circuits cause circuits to operate with reduced margins, or to fail completely. Moats are used in superconducting ground planes to create low energy locations for flux trapping. Moat design and placement strategies have been presented before, and several experiments published to evaluate moat efficiency. Although fluxons can be steered to moats to prevent trapping in or near Josephson junctions or inductive interconnects, the flux in a moat couples to nearby structures and induces dc currents in superconducting loops. In this paper, we discuss a set of numerical simulation tools for flux trapping analysis, developed under the IARPA SuperTools project. These tools are used to extract compact models for magnetic flux trapped in moats, including the magnetic coupling to superconducting structures. An open-source superconducting transient simulation engine, called JoSIM, is used to simulate these compact models. To evaluate the magnetic coupling of different moat configurations, we developed a set of a flux linkage experiments. Test structures were designed for the multi-layer MIT Lincoln Laboratory SFQ5ee process that allow for flux insertion into moats of different configurations. From experimental results we measure the effects of trapped flux, in different moat structures, on SQUID parameters and use the results to validate the compact models used by our tools.
Moats in superconducting ground planes are used to trap magnetic flux away from sensitive parts of superconductor integrated circuits. We simulate the effect of magnetic flux trapped in moats on the operating margins of ac-biased SFQ shift registers (ShReg) with two ground planes for various congruent moat geometries, moat sizes, locations in the ShReg cells, number and polarity of the trapped of fluxons. Using inductance extractor InductEx, we extract mutual couplings between the moats and the ShReg inductors and include them in the refined netlist. Then, we use JoSim to simulate the circuit operation and find the threshold ac clock amplitude above which the register starts to operate correctly. The relative change in this threshold is used to characterize the influence of flux trapping on the circuit operation. Monte-Carlo simulations are used to investigate the effect of the circuit parameter variations on the statistics of the threshold, using the standard deviation of the Josephson junction critical current and of the circuit inductance extracted from the fabrication process control monitors. The obtained distributions are compared with the independently measured distributions of the threshold amplitude for the individual cells of ac-biased shift registers with 108,500 Josephson junctions. The results show that flux trapping in properly designed moats have a very small effect on the operation margins of the large-scale shift registers whereas the main contribution to the cell-to-cell variation of the threshold comes from the variation of the junctions' critical currents.
Moats in superconducting ground planes are used to trap magnetic flux away from sensitive parts of superconductor integrated circuits. We simulate the effect of magnetic flux trapped in moats on the operating margins of ac-biased SFQ shift registers (ShReg) with two ground planes for various congruent moat geometries, moat sizes, locations in the ShReg cells, number and polarity of the trapped fluxons. Using inductance extractor InductEx, we extract mutual couplings between the moats and the ShReg inductors and include them in the refined netlist. Then we use JoSim to simulate the circuit operation and find the threshold ac clock amplitude above which the register starts to operate correctly. The relative change in this threshold is used to characterize the influence of flux trapping on the circuit operation. Monte-Carlo simulations are used to investigate the effect of the circuit parameter variations on the statistics of the threshold, using the standard deviation of the Josephson junction critical current and of the circuit inductance extracted from the fabrication process control monitors. The obtained distributions are compared with the independently measured distributions of the threshold amplitude for the individual cells of an ac-biased shift registers with 108,500 Josephson junctions. The results show that flux trapping in properly designed moats has a very small effect on the operation margins of the large-scale shift registers, whereas the main contribution to the cell-to-cell variation of the threshold comes from the variation of the junctions’ critical currents.
Superconductor digital electronics and quantum computing with superconducting qubits are promising next-generation computing technologies. When cooled down or operated in the presence of a nonzero background magnetic field BrB_rBr​, superconducting thin films comprising the circuits can trap magnetic vortices that can degrade circuit or qubit performance. In this work, we report a practical solution for eliminating flux trapped during cooldown in ambient magnetic fields, Br≤60B_r\leq 60Br​≤60 $\upmu$T, based on controlled local thermal gradients and moats, etched holes in the superconducting films of the circuit. Thermal gradients created by integrated on-chip resistive heaters move vortices towards the moats, where they become trapped away from circuitry regions and pinning sites. Using magnetic imaging and electrical circuit readout, we demonstrate that this approach is capable of removing magnetic flux trapped during field cooling and magnetic flux nucleated by circuit operation. If used in an environment with basic magnetic shielding, this solution is capable of suppressing all magnetic flux in a large-scale circuit, overcoming one of the long-standing challenges preventing high-performance scalable computing using superconductors.