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arXiv:2605.25948

Unified Flux Control Architecture for Fluxonium Qubits

Xianchuang Pan, Jiahui Wang, Tao Zhou, Yanbo Guo, Fei Wang, Ze Zhan, Liang Xiang, Zishuo Li, Lu Ma, Xizheng Ma, Huijuan Zhan, Tao Zhang, Kannan Lu, Xing Zhu, Guicheng Gong, Chunqing Deng, Tenghui Wang

quant-phSubmitted May 25, 2026• Announced May 26, 2026• 0 citations
v1 · May 25, 2026v2 · May 29, 2026
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Abstract

Control architectures that reduce hardware overhead while maintaining high-fidelity operations are essential for the continued scaling of superconducting quantum processors. Here we experimentally realize a unified control architecture for fluxonium qubits, in which both transverse ($XY$) and longitudinal ($Z$) operations are implemented through a single flux-control channel driven by a single arbitrary waveform generator channel. This architecture imposes competing requirements on the shared control channel, which must simultaneously support low-frequency flux transmission for reset operations while strongly attenuating broadband noise near the qubit transition frequency. We address this challenge through frequency-selective cryogenic filtering together with compensated waveform synthesis that corrects the pulse distortion introduced by the filtered control line. Experimentally, this approach preserves coherence times above 100 $μ$s while enabling active reset with approximately 98% fidelity and 20-ns single-qubit gates with fidelities exceeding 99.99%. We further demonstrate FPGA-native instruction-level waveform synthesis based on reusable pulse primitives for unified flux control. These results establish unified flux control as a scalable architecture for fluxonium qubits that reduces control hardware overhead while preserving high-fidelity operation.

Comments
13 pages, 7 figures

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Control architectures that reduce hardware overhead while maintaining high-fidelity operations are essential for the continued scaling of superconducting quantum processors. Here we experimentally realize a unified control architecture for fluxonium qubits, in which both transverse (XYXYXY) and longitudinal (ZZZ) operations are implemented through a single flux-control channel driven by a single arbitrary waveform generator channel. This architecture imposes competing requirements on the shared control channel, which must simultaneously support low-frequency flux transmission for reset operations while strongly attenuating broadband noise near the qubit transition frequency. We address this challenge through frequency-selective cryogenic filtering together with compensated waveform synthesis that corrects the pulse distortion introduced by the filtered control line. Experimentally, this approach preserves coherence times above 100 μμμs while enabling active reset with approximately 98% fidelity and 20-ns single-qubit gates with fidelities exceeding 99.99%. We further demonstrate FPGA-native instruction-level waveform synthesis based on reusable pulse primitives for unified flux control. These results establish unified flux control as a scalable architecture for fluxonium qubits that reduces control hardware overhead while preserving high-fidelity operation.
The heavy-fluxonium circuit is a promising building block for superconducting quantum processors due to its long relaxation and dephasing time at the flux-frustration point. However, the suppressed charge matrix elements and low transition frequency make it challenging to perform fast single-qubit gates using standard protocols. We report on new protocols for reset, fast coherent control,and readout that allow high-quality operation of the qubit with a 14 MHz transition frequency, an order of magnitude lower in energy than the ambient thermal energy scale. We utilize higher levels of the fluxonium to read out the qubit state and to initialize the qubit with 97% fidelity corresponding to cooling it to 190 μK. Instead of using standard microwave pulses, we control the qubit only with fast-flux pulses, generating control fields much larger than the qubit frequency. We develop a universal set of gates based on nonadiabatic Landau-Zener transitions that act in 20-60 ns, less than the single-qubit Larmor period. We measure qubit coherence of T1,T2e∼300 μs for a fluxonium in a 2D architecture and realize single-qubit gates with an average gate fidelity of 99.8% as characterized by randomized benchmarking.
Abstract Superconducting fluxonium qubits provide a promising alternative to transmons on the path toward large-scale superconductor-based quantum computing due to their better coherence and larger anharmonicity. A major challenge for multi-qubit fluxonium devices is the experimental demonstration of a scalable crosstalk-free multi-qubit architecture with high-fidelity single-qubit and two-qubit gates, single-shot readout, and state initialization. Here, we present a two-qubit fluxonium-based quantum processor with a tunable coupler element. We experimentally demonstrate fSim-type and controlled-Z-gates with 99.55 and 99.23% fidelities, respectively. The residual ZZ interaction is suppressed down to the few kHz levels. Using a galvanically coupled flux control line, we implement high-fidelity single-qubit gates and ground state initialization with a single arbitrary waveform generator channel per qubit.
Fluxonium qubits combine long coherence times with strong anharmonicity, making them a promising platform for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity operations in multi-qubit processors while suppressing stray qubit interactions using fluxonium-transmon-fluxonium (FTF) architectures. However, scaling such systems to larger arrays is constrained by a trade-off between achievable coupling strength, crosstalk suppression and qubit-qubit spacing required for wiring in a two-dimensional architecture. Multimode couplers, such as the double-transmon coupler (DTC), provide a promising pathway to overcome this limitation by enabling stronger interactions without compromising qubit spacing and isolation. Here, we develop a quantitative design framework for fluxonium-based quantum processors employing DTCs. Central to this work is a frequency-partitioned architecture that places qubit transitions, tunable-coupler excitations, and resonator modes in well-separated spectral regions. This structured allocation reduces parameter interdependence and enables the concurrent optimization of gate operations, readout, and qubit reset. By formulating device design as a multi-objective optimization problem under realistic experimental constraints and fabrication-induced disorder, we develop a tractable sequential workflow and determine a feasible parameter regime that simultaneously supports high-fidelity single- and two-qubit gates, fast qubit reset, and robust dispersive readout. These results establish a system-level architectural methodology that links circuit parameters to processor-level performance, and provide an experimentally actionable pathway toward scalable fluxonium quantum processors.
Protecting qubits from environmental noise while maintaining strong coupling for fast high-fidelity control is a central challenge for quantum information processing. Here, we demonstrate a control scheme for superconducting fluxonium qubits that eliminates qubit decay through the control channel by suppressing the environmental density of states at the transition frequency. Adding a low-pass filter on the flux line allows for flux-biasing and, at the same time, coherently controlling the fluxonium qubit by parametrically driving it at integer fractions of its transition frequency. We compare the filtered to the unfiltered configuration and find a 5-times-longer T 1 , and a 10-times-improved T 2 -echo time in the filtered case. We demonstrate coherent control with up to 11-photon subharmonic drives, highlighting the strong nonlinearity of the fluxonium potential. Measured Rabi frequencies and drive-induced frequency shifts show excellent agreement with numerical and analytical models. Furthermore, we show the equivalence of a 3-photon subharmonic drive to an on-resonance drive by benchmarking subharmonic gate fidelities above 99.94%. These results open up a scalable path for full qubit control through a single Purcell-protected channel, providing strong suppression of control-induced decoherence and enabling wiring-efficient superconducting quantum processors.
Real-time waveform generation supports dynamic quantum circuits without pre-storing complete waveforms for every execution path. However, long-lived distortions in flux-control lines degrade gate fidelity, requiring compensation to account for the actual pulse history. A frequency-domain inversion and time-domain fitting method is proposed for resource-efficient real-time flux distortion compensation. The method fits the reconstructed compensation impulse response with a compact hybrid infinite impulse response (IIR) and finite impulse response (FIR) filter. Look-ahead parallelization enables this filter to process synthesized waveforms at 1.2GSa/s on a field-programmable gate array (FPGA). Two-qubit cross-entropy benchmarking shows that real-time IIR filtering achieves a median controlled-Z Pauli fidelity close to the software-reference value of 99.57%. Numerical analysis and FPGA synthesis indicate approximately logarithmic growth in hardware resource use with compensation timescale. Extending compensation from microsecond to hundred-microsecond timescales increases look-up table (LUT) and digital signal processing (DSP) resource use by only about 14% and 4%, respectively, while maintaining a relative arithmetic error below 10−410^{-4}10−4. This work provides a scalable hardware foundation for high-fidelity flux control in dynamic superconducting quantum circuits.
The technological development of hardware heading toward universal fault-tolerant quantum computation requires a large-scale processing unit with high performance. While fluxonium qubits are promising with high coherence and large anharmonicity, their scalability has not been systematically explored. In this work, we propose a superconducting quantum information processor based on compact high-coherence fluxoniums with suppressed crosstalk, reduced design complexity, improved operational efficiency, high-fidelity gates, and resistance to parameter fluctuations. In this architecture, the qubits are readout dispersively using individual resonators connected to a common bus and manipulated via combined on-chip RF and DC control lines, both of which can be designed to have low crosstalk. A multi-path coupling approach enables exchange interactions between the high-coherence computational states and at the same time suppresses the spurious static ZZ rate, leading to fast and high-fidelity entangling gates. We numerically investigate the cross resonance controlled-NOT and the differential AC-Stark controlled-Z operations, revealing low gate error for qubit-qubit detuning bandwidth of up to 1 GHz. Our study on frequency crowding indicates high fabrication yield for quantum processors consisting of over thousands of qubits. In addition, we estimate low resource overhead to suppress logical error rate using the XZZX surface code. These results promise a scalable quantum architecture with high performance for the pursuit of universal quantum computation.